• ASIC Package Signal

    Cisco (San Jose, CA)
    power , speed, and fabrication / assembly technology. You will drive ASIC package power and signal integrity rules and layout analysis to enable ... ASIC team is looking for an expert in Signal and Power Integrity to help us... Integrity to help us develop our next generation ASIC packaging . You will work on cutting-edge… more
    Cisco (04/02/25)
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  • Analog/Mixed Signal ASIC Design…

    Qualcomm (San Diego, CA)
    …designers at various levels to help with designing high-speed, high-performance and low- power mixed- signal IPs (SerDes, DDR, PLL, DAC, ADC, sensors, etc.) ... targeted for 5G, AI/ML, compute, and automotive applications. QCT mixed- signal design team consists of architects and ASIC...our annual bonus). In addition, our highly competitive benefits package is designed to support your success at work,… more
    Qualcomm (03/18/25)
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  • Analog/Mixed Signal ASIC Design…

    Qualcomm (San Diego, CA)
    …integrated circuit designers at various levels to help with designing high-performance and low- power mixed- signal IPs (SerDes, DDR, PLL, DAC, ADC, sensors, etc.) ... Technologies, Inc. **Job Area:** Engineering Group, Engineering Group > Analog Mixed Signal Design **General Summary:** QCT Mixed- Signal IP (MSIP) design team… more
    Qualcomm (04/23/25)
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  • Sr. ASIC Packaging Engineer,…

    Amazon (Austin, TX)
    …work independently on multiple issues - Good understanding of transmission line theory, power delivery and signal integrity is desired. - Strong programming and ... the world. Annapurna Labs is looking for a Sr. Packaging Engineer. As a senior member of the team,...with product architect and design teams on future products package and assembly needs - Explore and provide recommendations… more
    Amazon (04/20/25)
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  • ASIC Design Senior Manager

    Broadcom (Fort Collins, CO)
    …, area, and speed. + Understanding of complex issues related to timing closure, power integrity and signal integrity. + Ability to debug complex design issues ... Candidate Account, please Sign-In before you apply.** **Job Description:** ** ASIC Design - Senior Manager** Be part of the...align and drive schedules with IP teams, DFT teams, packaging teams, quality teams, etc. + Ensure on-time execution… more
    Broadcom (03/26/25)
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  • Digital ASIC Design Engineer for High-Speed…

    Qualcomm (San Diego, CA)
    …Summary:** Qualcomm mixed- signal IP design team is seeking talented senior ASIC digital designers to join our efforts in developing the next generation of ... - Apply computer architecture and optimization techniques for improving power , performance, and area of the IPs - Assist...- Assist in running the full suite of front-end ASIC design tools (lint checking, CDC, DFT, synthesis, FV,… more
    Qualcomm (04/19/25)
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  • Sr. SOC/ ASIC Timing Signoff & Front-End…

    SpaceX (Irvine, CA)
    Sr. SOC/ ASIC Timing Signoff & Front-End Implementation Engineer (Silicon Engineering) Irvine, CA Apply SpaceX was founded under the belief that a future where ... with the ultimate goal of enabling human life on Mars. SR. SOC/ ASIC TIMING SIGNOFF & FRONT-END IMPLEMENTATION ENGINEER (SILICON ENGINEERING) At SpaceX we're… more
    SpaceX (04/15/25)
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  • Assistant Professor - Electrical Engineering:…

    San Jose State University (San Jose, CA)
    signal processing, network and network security, mobile network, power electronics, energy systems, microprocessors and computer systems, embedded systems, ... Assistant Professor - Electrical Engineering: ASIC , SOC, AI/ML Hardware & Embedded Systems Design Apply now… more
    San Jose State University (02/20/25)
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  • SOC/ ASIC Timing Signoff & Front-End…

    SpaceX (Irvine, CA)
    SOC/ ASIC Timing Signoff & Front-End Implementation Engineer (Silicon Engineering) Irvine, CA Apply SpaceX was founded under the belief that a future where humanity ... possible, with the ultimate goal of enabling human life on Mars. SOC/ ASIC TIMING SIGNOFF & FRONT-END IMPLEMENTATION ENGINEER (SILICON ENGINEERING) At SpaceX we're… more
    SpaceX (04/15/25)
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  • ASIC Implementation Engineer

    Broadcom (San Jose, CA)
    …, area, and speed. - Understanding of complex issues related to timing closure, power integrity and signal integrity. - Physical verification to ensure error ... industry, including AI. Be part of the Design Implementation team within Broadcom ASIC Products Division where we create CMOS ASIC 's for industry leading… more
    Broadcom (04/29/25)
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  • ASIC Design Engineer, Cloud-Scale Machine…

    Amazon (Austin, TX)
    …to Global 500 companies trust our robust suite of products and services to power their businesses. Diverse Experiences AWS values diverse experiences. Even if you do ... scale and rapid integration of emergent technologies. We're looking for an ASIC Design Eengineer to help us trail-blaze new technologies and architectures, while… more
    Amazon (04/24/25)
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  • Lead ASIC & FPGA Design Engineer - Vitis…

    Lockheed Martin (King Of Prussia, PA)
    …products & insertion opportunities\. **Who You Are** We are seeking a highly skilled ASIC & FPGA Design Engineer to join our team in developing and deploying Radar ... and other FPGA development tools \- Develop and optimize algorithms for signal processing, image processing, and machine learning acceleration on FPGAs \-… more
    Lockheed Martin (04/09/25)
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  • Signal and Power Integrity Engineer…

    Qualcomm (San Diego, CA)
    …team-oriented, professional engineering environment to perform a variety of signal and power integrity tasks and collaborate with package and IC designers to ... a smarter, connected future for all. As a Qualcomm ASIC Engineer, you will define, model, design (digital and/or...for Data Center products + Electrical model extraction and signal and power integrity simulations will constitute… more
    Qualcomm (03/21/25)
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  • Senior Signal and Power Integrity…

    NVIDIA (Santa Clara, CA)
    …layout PI extractions. + Opportunity to work in a dynamic cross-functional role to optimize package , PCB, ASIC , mixed signal circuit. What we need to see: ... We are now looking for a Senior Signal & Power Integrity Engineer! NVIDIA...cards, and Tegra systems. + Work closely with VLSI power teams and package /board design teams to… more
    NVIDIA (04/24/25)
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  • System Signal / Power Integrity…

    Broadcom (San Jose, CA)
    …presentations and written documents + Determine and document applicable requirements for ASIC package and PCB designs, drawing from industry standards, customer ... Candidate Account, please Sign-In before you apply.** **Job Description:** **System Signal / Power Integrity Engineer** _Responsibilities_ + Support high data rate… more
    Broadcom (03/14/25)
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  • Senior Signal and Power Integrity…

    NVIDIA (Santa Clara, CA)
    …MATLAB or similar tools. + Opportunity to work in a dynamic cross-functional role to optimize package , PCB, ASIC , mixed signal circuit. What we need to see: ... We are now looking for a Senior Signal & Power Integrity Engineer! NVIDIA...a system level timing or loss budget including silicon, package and board impairments. + Familiarity with use of… more
    NVIDIA (04/11/25)
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  • Senior Signal and Power Integrity…

    NVIDIA (Santa Clara, CA)
    …MATLAB or similar tools. + Opportunity to work in a dynamic cross-functional role to optimize package , PCB, ASIC , mixed signal circuit. What we need to see: ... We are now looking for a Senior Signal & Power Integrity Engineer! NVIDIA...a system level timing or loss budget including silicon, package and board impairments. + Familiarity with use of… more
    NVIDIA (03/12/25)
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  • Senior Signal and Power Integrity…

    NVIDIA (Santa Clara, CA)
    …MATLAB or similar tools. + Opportunity to work in dynamic cross-functional role to optimize package , PCB, ASIC , mixed signal circuit What we need to see: ... We are now looking for a Senior Signal & Power Integrity Engineer! NVIDIA...a system level timing or loss budget including silicon, package and board impairments. + Familiarity with use of… more
    NVIDIA (04/23/25)
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  • Senior Signal Integrity Engineer (Hardware)

    Palo Alto Networks (Santa Clara, CA)
    …Experience** + Strong background in hands-on design and validation of high-speed PCB and ASIC package development + Power integrity design and analysis and ... and PCB layout rules: perform pre- and post-route signal integrity analysis of ASIC and multi-chip-module...ASIC and multi-chip-module designs + Model and analyze power delivery networks for ASIC / package /module… more
    Palo Alto Networks (03/29/25)
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  • Analog Mixed Signal IC Design Engineer…

    Fortive Corporation (Beaverton, OR)
    …to optimize performance and manufacturability. + ** Signal Analysis:** Perform signal analysis on systems external to the ASIC . + **Characterization:** ... **Key Responsibilities:** + **Design:** Develop and manage large analog and mixed signal blocks and full chip schematics. + **Layout Design:** Design sensitive… more
    Fortive Corporation (03/04/25)
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