- Cisco (San Jose, CA)
- … power , speed, and fabrication / assembly technology. You will drive ASIC package power and signal integrity rules and layout analysis to enable ... ASIC team is looking for an expert in Signal and Power Integrity to help us... Integrity to help us develop our next generation ASIC packaging . You will work on cutting-edge… more
- IBM (Rochester, MN)
- …. Comprehensive understanding of Microprocessor, ASIC , Signal and Power Integrity, 1st Level Chip Packaging , and hardware development engineering ... channels and Power Distribution Networks . Familiarity with Microprocessor and ASIC 1st Level Chip Packaging and Hardware Development . Demonstrated… more
- IBM (Rochester, MN)
- …. Industry work experience in Microprocessor, ASIC , Signal and Power Integrity, 1st Level Chip Packaging , or Hardware Development environment . ... paired with introductory knowledge of Signal and Power Integrity and 1st Level Chip Packaging ... Distribution Networks . Basic understanding of Microprocessor and ASIC 1st Level Chip Packaging and hardware… more
- Qualcomm (San Diego, CA)
- …integrated circuit designers at various levels to help with designing high-performance and low- power mixed- signal IPs (SerDes, DDR, PLL, DAC, ADC, sensors, etc.) ... Technologies, Inc. **Job Area:** Engineering Group, Engineering Group > Analog Mixed Signal Design **General Summary:** QCT Mixed- Signal IP (MSIP) design team… more
- Broadcom (Fort Collins, CO)
- …, area, and speed. + Understanding of complex issues related to timing closure, power integrity and signal integrity. + Ability to debug complex design issues ... Candidate Account, please Sign-In before you apply.** **Job Description:** ** ASIC Design - Senior Manager** Be part of the...align and drive schedules with IP teams, DFT teams, packaging teams, quality teams, etc. + Ensure on-time execution… more
- Qualcomm (San Diego, CA)
- …Summary:** Qualcomm mixed- signal IP design team is seeking talented senior ASIC digital designers to join our efforts in developing the next generation of ... - Apply computer architecture and optimization techniques for improving power , performance, and area of the IPs - Assist...- Assist in running the full suite of front-end ASIC design tools (lint checking, CDC, DFT, synthesis, FV,… more
- Broadcom (San Jose, CA)
- …, area, and speed. - Understanding of complex issues related to timing closure, power integrity and signal integrity. - Physical verification to ensure error ... industry, including AI. Be part of the Design Implementation team within Broadcom ASIC Products Division where we create CMOS ASIC 's for industry leading… more
- Amazon (Austin, TX)
- …to Global 500 companies trust our robust suite of products and services to power their businesses. Diverse Experiences AWS values diverse experiences. Even if you do ... scale and rapid integration of emergent technologies. We're looking for an ASIC Design Eengineer to help us trail-blaze new technologies and architectures, while… more
- Broadcom (San Jose, CA)
- …including synthesis, design for test, floorplanning, place and route, clock methodology, power planning and analysis, timing closure, signal integrity and ... please Sign-In before you apply.** **Job Description:** **Job Description:** + ASIC implementation engineer with demonstrated expertise in multiple disciplines… more
- Lockheed Martin (King Of Prussia, PA)
- …products & insertion opportunities\. **Who You Are** We are seeking a highly skilled ASIC & FPGA Design Engineer to join our team in developing and deploying Radar ... and other FPGA development tools \- Develop and optimize algorithms for signal processing, image processing, and machine learning acceleration on FPGAs \-… more
- Amazon (San Diego, CA)
- …Amazon! We're hiring a Sr. Modem Design Engineer within a high performance ASIC design team. This team is using industry leading methodologies to develop proprietary ... to chip specification to RTL to optimizing timing / power to chip level validation. . Develop solutions optimizing...communication systems. . Experience in designing and implementing Digital Signal Processing (DSP) algorithms and systems in RTL. .… more
- Qualcomm (San Diego, CA)
- …team-oriented, professional engineering environment to perform a variety of signal and power integrity tasks and collaborate with package and IC designers to ... a smarter, connected future for all. As a Qualcomm ASIC Engineer, you will define, model, design (digital and/or...for Data Center products + Electrical model extraction and signal and power integrity simulations will constitute… more
- NVIDIA (Santa Clara, CA)
- …layout PI extractions. + Opportunity to work in a dynamic cross-functional role to optimize package , PCB, ASIC , mixed signal circuit. What we need to see: ... We are now looking for a Senior Signal & Power Integrity Engineer! NVIDIA...cards, and Tegra systems. + Work closely with VLSI power teams and package /board design teams to… more
- NVIDIA (Santa Clara, CA)
- …MATLAB or similar tools. + Opportunity to work in a dynamic cross-functional role to optimize package , PCB, ASIC , mixed signal circuit. What we need to see: ... We are now looking for a Senior Signal & Power Integrity Engineer! NVIDIA...a system level timing or loss budget including silicon, package and board impairments. + Familiarity with use of… more
- NVIDIA (Santa Clara, CA)
- …MATLAB or similar tools. + Opportunity to work in a dynamic cross-functional role to optimize package , PCB, ASIC , mixed signal circuit. What we need to see: ... We are now looking for a Senior Signal & Power Integrity Engineer! NVIDIA...a system level timing or loss budget including silicon, package and board impairments. + Familiarity with use of… more
- NVIDIA (Santa Clara, CA)
- …MATLAB or similar tools. + Opportunity to work in dynamic cross-functional role to optimize package , PCB, ASIC , mixed signal circuit What we need to see: ... We are now looking for a Senior Signal & Power Integrity Engineer! NVIDIA...a system level timing or loss budget including silicon, package and board impairments. + Familiarity with use of… more
- Palo Alto Networks (Santa Clara, CA)
- …Experience** + Strong background in hands-on design and validation of high-speed PCB and ASIC package development + Power integrity design and analysis and ... and PCB layout rules: perform pre- and post-route signal integrity analysis of ASIC and multi-chip-module...ASIC and multi-chip-module designs + Model and analyze power delivery networks for ASIC / package /module… more
- Qualcomm (San Diego, CA)
- …**Job Area:** Engineering Group, Engineering Group > Analog Mixed Signal Design **General Summary:** Oversees definition, design, verification, and documentation ... Engineering with 2+ years of experience with analog or mixed- signal integrated circuit design in nanometer planar CMOS or...nanometer planar CMOS or FinFET and 2+ years of ASIC design, verification, or related work experience. OR Master's… more
- Qualcomm (San Diego, CA)
- …degree in Science, Engineering, or related field and 6+ years of ASIC design, verification, validation, integration, or related work experience. OR Master's degree ... in Science, Engineering, or related field and 5+ years of ASIC design, verification, validation, integration, or related work experience. OR PhD in Science,… more
- L3Harris (Anaheim, CA)
- …of the ASIC design and ASIC capabilities ranging from throughput, power consumption, thermal, aging and packaging . + Expert using various ASIC ... years of prior related experience. + 20+ years of experience in hands-on ASIC Engineering and Signal Processing Design, Development, Test, and Manufacturing for… more