- Google (Sunnyvale, CA)
- …into our cutting-edge data centers affecting millions of Google users. As an ASIC and SoC System Level Test Engineer, you will help to integrate SoC ... experience with bench, high-volume manufacturing (HVM) system level test, or hardware testing systems , test,...test, and flow development. + Experience with hardware, PCBA, ASIC , or SoC prototype bring-up, debug, functional… more
- SpaceX (Redmond, WA)
- Sr. SOC / ASIC Physical Design Engineer (Silicon Engineering) at SpaceX Redmond, WA SpaceX was founded under the belief that a future where humanity is out ... this possible, with the ultimate goal of enabling human life on Mars. SR. SOC / ASIC PHYSICAL DESIGN ENGINEER (SILICON ENGINEERING) At SpaceX we're leveraging our… more
- SpaceX (Sunnyvale, CA)
- SOC / ASIC Synthesis & Front-End STA Engineer (Silicon Engineering) at SpaceX Sunnyvale, CA SpaceX was founded under the belief that a future where humanity is out ... the ultimate goal of enabling human life on Mars. SOC / ASIC SYNTHESIS & FRONT-END STA ENGINEER (SILICON...to deploy Starlink, the world's most advanced broadband internet system . Starlink is the world's largest satellite constellation and… more
- NVIDIA (Santa Clara, CA)
- …Floorsweep, In-silicon measurement, Reset, Sysctrl) + RTL design, synthesis, timing + Silicon bring-up + SOC level integration What we need to see: + BS / MS in ... chance to work on architecture, design and synthesis for System - level modules for complex GPU and Tegra...from the crowd: + Familiarity with ARM CPU and SoC system architecture, microprocessor, and microcontroller fundamentals… more
- Micron Technology, Inc. (San Jose, CA)
- …**What's Encouraged Daily** + Reviewing product and FW requirements + Working with other ASIC architects and with system architects to define and document the ... of CPU and memory architectures, data path pipelining mechanisms, distributed system design, ASIC low-power implementations, clock and reset methodologies.… more
- Meta (Menlo Park, CA)
- …implement IP/ SoC verification plans, build verification test benches to enable IP/sub- system / SoC level verification. 2. Develop functional tests based on ... **Summary:** Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization.... development cycles. 10. 5+ years of experience in IP/sub- system and/or SoC level verification… more
- Meta (Austin, TX)
- …success' in ASIC development cycles 9. 3+ years experience in block/IP/sub- system and/or SoC level verification based on SystemVerilog UVM/OVM ... **Summary:** Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization.... verification plans, build verification test benches to enable block/IP/sub- system / SoC level verification 2. Develop… more
- Meta (Austin, TX)
- …implement IP/ SoC verification plans, build verification test benches to enable IP/sub- system / SoC level verification 2. Develop functional tests based on ... **Summary:** Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization....and/or C/C++ based verification 10. 10+ years experience in IP/sub- system and/or SoC level verification… more
- Qualcomm (San Diego, CA)
- …+ Strong working knowledge in the entire low power, high performance ASIC / SoC design flows (micro-architecture, RTL design, verification, synthesis, timing/STA, ... company in the world. Qualcomm is looking for bright ASIC engineers with excellent analytical and technical skills, and...This is a great opportunity to join a fast-paced SoC team responsible for development of next Generation, high… more
- SpaceX (Sunnyvale, CA)
- …to solve complex problems including clock domain crossings and power optimization + ASIC / SoC system integration experience + Experience with high reliability ... curious engineer who will work alongside world-class cross-disciplinary teams ( systems , firmware, architecture, design, validation, product engineering, ASIC … more
- Meta (Sunnyvale, CA)
- …silicon development experience, and a proven track record of first-pass success in ASIC and Systems . **Required Skills:** ASIC Engineering Manager, Design ... or equivalent practical experience 11. 10+ years experience managing ASIC / SoC design verification teams at the Director... design verification teams at the Director or Manager level 12. Clear understanding of complexities involved with various… more
- Amazon (Sunnyvale, CA)
- …and design hardware accelerator IP in Verilog HDL - Help define and own ASIC design methodologies - Lead cross functional SOC development activities - Work ... Description As a Sr. ASIC Design Engineer, you work with a team...vision and robotics. You will work closely with scientists, SoC Architects, software and verification to develop IP that… more
- Cisco (San Jose, CA)
- … Verilog and UVM methodology * Experience in verifying complex blocks, clusters and top level for SoC * Can build testbenches from scratch, hands on experience ... be in the Silicon One development organization as an ASIC design verification engineer in San Jose, CA. You...hands-on experience in RTL verification and in-depth knowledge of SoC development cycle and the best industry practices, from… more
- Qualcomm (San Diego, CA)
- …Engineer The team is responsible for the complete verification lifecycle, from system - level concept to tape out and post-silicon support. The responsibility ... UVM, system verilog, assertion, C++, python **Technology:** DDR, CACHE, SOC **Minimum Qualifications:** * Bachelor's degree in Science, Engineering, or related… more
- SLAC National Accelerator Laboratory (Menlo Park, CA)
- …strengthen its capabilities in analog/mixed signal design to implement the next generation system -on-chip ( SoC ) ASICs. As mixed signal designer you will be ... + Floor planning, layout design and physical verification of active circuits. + Top- level simulations to validate ASIC integration. + Document design towards… more
- SpaceX (Sunnyvale, CA)
- …curious engineer who will work alongside world-class cross-disciplinary teams ( systems , firmware, architecture, design, validation, product engineering, ASIC ... Sr. ASIC Design Engineer, DDR IP (Silicon Engineering) at...to deploy Starlink, the world's most advanced broadband internet system . Starlink is the world's largest satellite constellation and… more
- NVIDIA (Santa Clara, CA)
- …Team is committed to deliver high-quality clocking and reset logic to various units in SOC and GPU ASIC . The complexity of the clocks and resets design has ... doing: + Own validation of Clocking structures in Tegra SOC GPU ASIC products from start to...profiling tools, X prop, etc. + Exposure on block level and system - level verification. +… more
- NVIDIA (Santa Clara, CA)
- …debug tools like Verdi, GDB) + Experience crafting test bench environments for unit and system level verification + Strong background in System Verilog or ... NVIDIA is seeking elite ASIC Verification Engineers to verify the design and...verify the design and implementation of the world's leading SoC 's and GPU's. This position offers the opportunity to… more
- NVIDIA (Santa Clara, CA)
- …teammate are huge plus + Experience in crafting test bench environments for unit and system level verification NVIDIA is widely considered to be one of the ... NVIDIA is seeking elite ASIC Verification Engineers to verify the design and...verify the design and implementation of the world's leading SoC 's and GPU's. This position offers the opportunity to… more
- Amazon (Redmond, WA)
- …responsibilities - Gate Level Simulation: Develop and maintain comprehensive gate- level simulation test plans for verifying ASIC functionality and timing. ... this role you will: . Work closely with the system architects to develop world-class SOC and...years of experience in digital design, preferably in communication systems . Familiarity with UVM and Matlab . Ability… more