- NVIDIA (Santa Clara, CA)
- NVIDIA is seeking a Senior Custom SOC IP Verification Engineer to verify the next generation SoC and IP solutions! We are looking for special ... we will build the next generation of life changing custom SOCs! If you are a motivated individual that...success in ASIC Development + Experience owning processing ASIC, IP or SoC design verification … more
- NVIDIA (Santa Clara, CA)
- NVIDIA is seeking a Senior Custom SOC / IP Verification Engineer to verify the next generation SoC and IP solutions! We are looking for special ... we will build the next generation of life changing custom SOCs! If you are a motivated individual that...What you'll be doing: + Responsible for ASIC design verification for various processing blocks within a SOC… more
- NVIDIA (Santa Clara, CA)
- NVIDIA is seeking a Senior Custom SOC / IP Verification Engineer to verify the next generation SoC and IP solutions! We are looking for special ... we will build the next generation of life changing custom SOCs! If you are a motivated individual that...What you'll be doing: + Responsible for ASIC design verification for various processing blocks within a SOC… more
- Micron Technology, Inc. (Richardson, TX)
- …that are transforming how the world uses information to enrich life. As an HBM SOC Pre-Silicon Verification Engineer, you will be responsible for the design & ... is successful. You will apply your deep understanding of SOC Architecture, RTL Logic Design, IP Integration,..."high bandwidth"; is an outstanding memory design area where custom gate-level design and RTL style logic design are… more
- Amazon (Cupertino, CA)
- …- Experience verifying multiple levels of design including: custom blocks, IP blocks, sub-systems, and fullchip SOC system testing. - Experience using ... customers across all industries. We are seeking experienced Design Verification Engineers to build the next generation of our...in our data centers. Key job responsibilities - verify custom chip designs at the SOC level… more
- Meta (Sunnyvale, CA)
- …high-speed protocols like PCIe/Ethernet/DDR, computer architecture and NOC. 4. Define and implement IP / SoC verification plans, build verification test ... benches to enable IP /sub-system/ SoC level verification . 5. Develop functional tests based on verification test plan. 6. Drive Design Verification to… more
- Meta (Sunnyvale, CA)
- …methodology and C/C++ based verification 10. 8+ years of experience in IP /sub-system and/or SoC level verification based on SystemVerilog UVM/OVM based ... pre- and post-Silicon product lifecycle 6. Support hand-off and integration of developed subsystems/ IP blocks into larger SOC environments 7. Develop and drive… more
- Meta (Sunnyvale, CA)
- …C/C++ based verification and UVM methodology 10. 2+ years experience in IP /sub-system and/or SoC level verification based on SystemVerilog UVM/OVM based ... to implement the testing infrastructure to validate new core IP or System on Chip ( SoC ) implementations....verification plans for each of the different core IP 2. Define and track detailed test plans for… more
- Qualcomm (Austin, TX)
- …flow. This position involves the design and development of best-in-class custom digital IP from RTL to GDS for optimizing SoC Power, Performance and Area ... technologies. To support its growing needs, we have a Custom Solutions Team for design and development (RTL to...(RTL to GDS) of various highspeed and low power IP 's (mini-macros) which are used across different sub-systems in… more
- Meta (San Diego, CA)
- …8. 6+ years ASIC development cycle industry experience 9. 6+ years experience in IP /sub-system and/or SoC level verification based on SystemVerilog UVM/OVM ... Reality (AR). Compute power requirements of Augmented Reality require custom silicon. Meta RL Silicon team is driving the...verification plans for each of the different core IP 2. Define and track detailed test plans for… more
- Micron Technology, Inc. (Richardson, TX)
- …to ensure the success of our HBM roadmap. Your deep understanding of SOC Architecture, RTL Logic Design, IP Integration, high-speed interface design, ... vendors to select off-the-shelf IPs, and modify or custom design new ones if needed. + Review architectural...integration methods, including DFT/MBIST, CDC, static LP checks, and SOC interconnects, etc. + Demonstrated ability automating IP… more
- Amazon (Sunnyvale, CA)
- …and route, power/clock distribution, congestion analysis, timing closure, IR drop analysis, physical verification , and ECO - 7+ years integrating IP and ability ... Description The team that built the innovative Silicon IP AZ1 Neural Edge that is powering the...level. - Drive block physical implementation through synthesis, formal verification , floor planning, bus / pin planning, place and… more
- Siemens (Fremont, CA)
- …Solido Custom IC Platform , a comprehensive AI-powered design and verification platform of EDA solutions. It includes custom simulation (SPICE, FastSPICE ... design and verification tasks for their next-generation analog, RF, mixed-signal , library IP , memory and SoC designs. This Product Manager will work as a… more
- Google (Fremont, CA)
- …or a related field, or equivalent practical experience. + 15 years of experience in full custom SOC design, or 10 years with an advanced degree. + 3 years of ... and mixed-signal circuits. + Drive the development and integration of large, full- custom Pixel Array IP , including specialized MicroLED drivers for individual… more
- Meta (Redmond, WA)
- …skills/knowledge to drive strategy, planning and prioritization for testing infrastructure, verification and validation of machine learning Hardware IP . You ... SW-HW verification methodologies and strategies for Machine learning accelerator IP 3. Define and track project milestones and detailed plans for module-… more
- Google (Mountain View, CA)
- …Development. + Experience in custom circuit design and simulation of Analog Mixed-Signal IP . + Experience with SERDES IP integration such as PCIe, USB, D2D ... UCIe into SoC from feature definition to full design implementation. Preferred...team on Post-Silicon debug, leading to seamless execution from IP sourcing, integration to final post-Silicon verification .… more
- Meta (Sunnyvale, CA)
- …GDSII in low power and high-performance designs to build efficient System on Chip ( SoC ) and IP for data center applications. **Required Skills:** ASIC Engineer, ... synthesis, static timing analysis, IR drop, EM, and physical verification in advanced technology nodes 2. Resolve design and...drive execution 3. Deliver physical design of an end-to-end IP or integration of ASIC/ SoC design and… more
- Meta (Austin, TX)
- …GDSII in low power and high-performance designs to build efficient System on Chip ( SoC ) and IP for data center applications. **Required Skills:** ASIC Engineer, ... synthesis, static timing analysis, IR drop, EM, and physical verification in advanced technology nodes 2. Resolve design and...drive execution 3. Deliver physical design of an end-to-end IP or integration of ASIC/ SoC design and… more
- Amazon (Redmond, WA)
- …you will: - Work closely with the system architects to define and architect world-class SoC and IP blocks, which meet power, area and performance targets. - ... speed SERDES, Ethernet, DRAM interface, compute cores, interconnects, complex custom IPs with focus on performance, power and area....Define compute architecture for wireless protocol stack and packet processing. - Develop performance model… more
- Qualcomm (Santa Clara, CA)
- …and power grid planning. + Skilled in physical design, integration, and verification of large processor and system-on-chip ( SoC ) designs. + Extensive ... chip-level place and route, and finalize the CPU database for construction and verification . + Coordinate custom layout integration. + Collaborate with external… more