- Huntington Ingalls Industries (Fort Meade, MD)
- …Engineering, Computer Science, or a related field * Experience with modern digital verification and modeling languages: SystemVerilog, SystemC, C/C++, Matlab, ... We look forward to meeting you. Job Description Do you enjoy challenging digital design verification problems? HII Mission Technologies is seeking out-of-the-box… more
- Northrop Grumman (San Diego, CA)
- …part of history, they're making history. Explore a career engineering what's possible as a Digital Verification Engineer in San Diego, CA. **What You'll Get ... from the beach Southern California is famous. As a Digital Verification Engineer at Northrop...or higher levelMSSDEAS Salary Range: $118,000.00 - $177,000.00Salary Range 2 : $146,300.00 - $219,500.00 The above salary range represents… more
- Northrop Grumman (Linthicum Heights, MD)
- …of your career. We are looking for you to join our team as a Principal Digital Verification Engineer /Senior Principal Digital Verification ... NC. This requisition may be filled as a Principal Digital Engineer or a Senior Principal ...our cross-discipline engineering team in Mission Systems that encompasses Digital Verification Engineering to support ASIC and… more
- Northrop Grumman (Annapolis Junction, MD)
- …Sr. Principal level. Qualifications for both are listed below:** **Basic Qualifications Principal Digital Verification Engineer :** + Bachelor's degree in a ... Top Secret/SCI security clearance with Polygraph** **.** **Basic Qualifications Senior Principal Digital Verification Engineer :** + Bachelor's degree in a… more
- Huntington Ingalls Industries (Roanoke, VA)
- …Engineering, Computer Science, or a related field * Experience with modern digital verification and modeling languages: SystemVerilog, SystemC, C/C++, Matlab, ... for a short video: https://vimeo.com/732533072 Job Description Do you enjoy challenging digital design verification problems? HII Mission Technologies is seeking… more
- Actalent (Redmond, WA)
- Job Title: Silicon Verification Engineer Job Description The Silicon Verification Engineer plays a crucial role in the test-plan generation process, ... years of experience with SystemVerilog and UVM. + Minimum 2 years of experience with Mixed Signal Verification...+ Previous experience with mixed signal exposure, analog, and digital . + Fluency in SystemVerilog and UVM with significant… more
- SpaceX (Redmond, WA)
- Design Verification Engineer (Silicon Engineering) Redmond, WA Apply SpaceX was founded under the belief that a future where humanity is out exploring the stars ... ultimate goal of enabling human life on Mars. DESIGN VERIFICATION ENGINEER (SILICON ENGINEERING) At SpaceX we're...capabilities of the Starlink network. RESPONSIBILITIES: + Responsible for digital ASIC and/or FPGA verification at block… more
- Skyworks (Cedar Rapids, IA)
- Sr. Verification Engineer Apply now " Date:May 15, 2025 Location: Cedar Rapids, IA, US Company: Skyworks If you are looking for a challenging and exciting career ... ID: 75221 Description If you are a Mixed Signal Verification engineer with 4+ years of experience,...Write System Verilog UVM testbench code for die level verification checking digital , analog & RF functionality… more
- Qualcomm (Santa Clara, CA)
- …field + 2 + years of experience with ASIC design and verification tools, techniques, and methodology **Preferred Qualifications** + Master's degree in Computer ... Qualifications:** * Bachelor's degree in Science, Engineering, or related field and 2 + years of ASIC design, verification , validation, integration, or related… more
- Meta (Sunnyvale, CA)
- …the entire stack, through algorithms to architecture, transistors to firmware. As a Design Verification Engineer at Meta's Reality Labs, you will work with a ... multiple state of the art machine learning IPs. **Required Skills:** Design Verification Engineer - Machine Learning Accelerators Responsibilities: 1. Work with… more
- Meta (Sunnyvale, CA)
- …entire stack, from transistor, through architecture, to firmware, and algorithms. As a Design Verification Engineer at Meta Reality Labs, you will work with a ... for multiple state of the art IPs or SoCs. **Required Skills:** Design Verification Engineer Responsibilities: 1. Work with researchers and architects defining … more
- Meta (Redmond, WA)
- …the entire stack, from transistor, through architecture, to firmware, and algorithms.As a Design Verification Engineer at Meta Reality Labs, you will work with a ... test cases for multiple state of the art IPs. **Required Skills:** Design Verification Engineer (University Grad) Responsibilities: 1. Work with researchers and… more
- Meta (San Diego, CA)
- …the entire stack, from transistor, through architecture, to firmware, and algorithms.As a Design Verification Engineer at Meta Reality Labs, you will work with a ... cases for multiple state of the art IPs. **Required Skills:** Design Verification Engineer Responsibilities: 1. Work with researchers and architects defining… more
- Qualcomm (Santa Clara, CA)
- …the Invention Age - and this is where you come in as an ASIC Design Verification Engineer The team is responsible for the complete verification lifecycle, ... of the position involves comprehensive pre-silicon test planning for digital power IP's, its testbench development using the advanced...OR PhD in Science, Engineering, or related field and 2 + years of ASIC design, verification , validation,… more
- The Boeing Company (Huntington Beach, CA)
- …Systems has an exciting opportunity for multiple **ASIC and/or FPGA Design and Verification Engineers (Entry Level, Associate or Mid-Level)** to join us as part of ... enable high-integrity, low SWAP-C flight computers. And we're applying the latest digital IC design processes with industry-best tools to enable applications that… more
- Broadcom (San Jose, CA)
- …**Job Description:** + Broadcom is looking for a senior level Mixed Signal Design Verification engineer . In this highly visible role you will be working on ... for a job. (Click Sign In > Create Account)** ** 2 . If you already have a Candidate Account, please...+ Familiarity with generating randomized vectors for analog and digital behavioral model verification + Hands-on knowledge… more
- Qualcomm (San Diego, CA)
- …Master's/Bachelor's degree in Electrical Engineering, Computer Engineering, or related field. + 2 + years ASIC design verification , or related work experience. + ... models, debug and ensure coverage closure. + Work with digital design, analog circuit design, modeling, controller/subsystem, & SoC...OR PhD in Science, Engineering, or related field and 2 + years of ASIC design, verification , validation,… more
- Qualcomm (Santa Clara, CA)
- …and strong teamwork **Required Skillset** + Experience with various aspects of digital verification such as test automation, code and functional coverage, ... of practical semiconductor ASIC DV experience including owning end-to-end verification of major SoC blocks + 2 +...end-to-end verification of major SoC blocks + 2 + years' leadership experience taking projects to Tape out… more
- Amazon (Austin, TX)
- …Qualifications - Master's or Ph.D degree in Electrical / Communications Engineering - 2 + years in digital verification , preferably in communication systems ... Communications Engineering or Computer Science, or related field, or equivalent experience - 2 + years in verification preferably in communication systems - 1+… more
- Broadcom (San Jose, CA)
- …apply.** **Job Description:** Broadcom is looking for a senior level Mixed Signal Design Verification engineer . In this highly visible role you will be working ... for a job. (Click Sign In > Create Account)** ** 2 . If you already have a Candidate Account, please...+ Familiarity with generating randomized vectors for analog and digital behavioral model verification + Hands-on knowledge… more