- Compunnel, Inc. (Mountain View, CA)
- A leading technology firm seeks a skilled FPGA Verification Engineer in Mountain View. This role involves verifying FPGA designs with advanced ... methodologies and requires strong expertise in SystemVerilog, UVM , and debugging skills. The ideal candidate will develop verification plans, utilize… more
- Compunnel, Inc. (Mountain View, CA)
- The FPGA Verification Engineer will be responsible for verifying FPGA designs using advanced methodologies and tools. This role requires strong expertise ... deliverables. Key Responsibilities Develop and execute verification plans for FPGA designs using SystemVerilog and UVM methodology. Utilize industry-standard… more
- Compunnel, Inc. (Santa Clara, CA)
- We are seeking a highly motivated and skilled FPGA Verification Engineer to join our team. This role is responsible for verifying complex FPGA designs to ... Engineering, or related field. 3+ years of experience in FPGA verification . Strong understanding of FPGA... design principles and architectures. Proficiency in SystemVerilog and UVM . Experience with verification tools such as… more
- Kubelt (Alameda, CA)
- …block diagrams, interface definitions, and design specifications Develop and enhance FPGA verification workflows, utilizing simulation and formal verification ... Foundry. We are seeking a highly skilled and motivated FPGA /Firmware Engineer to join our team and...industry or other highly regulated environments Experience with RTL verification frameworks (eg, UVM , cocotb) Exposure to… more
- NightDragon Acquisition Corp. (Torrance, CA)
- …FPGA systems and embedded processing solutions for RF applications. As a Sr. FPGA Engineer , you will work closely with a talented, multi-disciplinary ... to rapidly produce new products . Duties Design and verification of RTL modules for FPGA applications...languages (TCL, Python, Perl, Matlab) Knowledge of Advanced Firmware Verification Testbench Development ( UVM , System Verilog) Skilled… more
- Blue Origin LLC (Seattle, WA)
- …a **Principal-Level FPGA Developer**, you will lead the design, implementation, verification , and testing of our FPGA based solutions for satellite ... self-starting engineering lead with strong ownership of the end-to-end FPGA solution. An engineer skilled with DO-254...with sophisticated verification techniques such as Universal Verification Methodology ( UVM ) and Constrained Random … more
- Apple Inc. (San Diego, CA)
- …Design and verification that aids with emulation activities, using Verilog/System Verilog/ UVM . Minimum Qualifications BS and a minimum of 3 years of relevant ... Emulation. Good understanding of any Standard Emulator (Palladium, Veloce, Zebu) OR FPGA (Xilinx, Altera) flow. Proven Design Verification or Silicon Validation… more
- Apple Inc. (Santa Clara, CA)
- …Clock Control verification . Description As a CPU Processor Power Management Verification Engineer , you will have the responsibilities as follows: Work ... on developing tests that work in the emulation and FPGA environments. Aid silicon debug in related part of...in design verification environments like random constraint verification and/or UVM base testbenches Experience in… more
- FLIR Systems, Inc. (Milpitas, CA)
- …optimization. + Integrate PCIe IP cores, DMA engines, and custom protocol decoders.* ** Verification & Debug** + Build SystemVerilog/ UVM testbenches for block and ... Staff Logic Design Engineer page is loaded## Staff Logic Design Engineerlocations:...for protocol capture, analysis, and emulation. You'll work on FPGA -based systems that decode and analyze High speed protocols… more
- Qualcomm (Santa Clara, CA)
- …of the synthesized FPGA RTL. System level RTL simulation & design verification . Support chip bring up and post silicon debug. Debug functional and timing models. ... from RTL. 4+ years of hands‑on emulator platforms, platform bringup, digital design, verification , debugging, and waveform viewers. 4+ FPGA systems based on… more
- Qualcomm (San Diego, CA)
- …in Electrical Engineering or equivalent; 1 year of practical experience Design Verification knowledge - UVM /System Verilog preferred Knowledge of GPU/CPU/DDR/Bus ... help create a smarter, connected future for all. As a Qualcomm GPU Engineer , you may architect, design, implement, verify, and/or optimize the performance and power… more
- L3Harris (Columbia, MD)
- …cutting-edge tactical communication systems that protect those who protect us. As an FPGA Verification Engineer , you'll collaborate with a talented, ... Job Title: Senior Specialist, Electrical Engineer - FPGA /ASIC Verification Engineer Job Code:...Programming(C++, JAVA). + Proven proficiency in FPGA /ASIC verification using SystemVerilog. + Working knowledge of UVM… more
- Lockheed Martin (Denver, CO)
- **Description:** Join Our Team as a **ASIC/ FPGA Verification Engineer ** where you will work on the development of a sophisticated state\-of\-the\-art ... are seeking a highly talented and motivated **ASIC & FPGA Verification Engineer ** who has...ASIC/ FPGA verification experience with modern verification methodologies such as UVM , OVM or… more
- The Boeing Company (El Segundo, CA)
- …Missiles & Weapons; Strike, Surveillance and Mobility; and Autonomous Systems). As an ASIC/ FPGA Verification Engineer on the Boeing Electronic Products team ... units designed at other sites. **Position Responsibilities:** + Design and implement an ASIC/ FPGA verification environment utilizing UVM & System Verilog. +… more
- BAE Systems (Westminster, CO)
- …incentives may be available based on position level and/or job specifics. **Senior Principal FPGA Verification Engineer - $15K Sign On Bonus** **115210BR** ... used across multiple projects. + Work in a System Verilog/ UVM environment developing tests, testbenches, UVM components,...regressions/testlists. + Be responsible for generating and executing the FPGA Verification Test Plan and FPGA… more
- Lockheed Martin (Highlands Ranch, CO)
- **Description:** Join Our Team as a **ASIC/ FPGA Verification Engineer ** where you will work on the development of a sophisticated state\-of\-the\-art ... Space's Silicon Solutions team and seeking a future\-looking Principal Verification Engineer who is able to case...of FPGA and ASIC devices utilizing modern verification methodologies such as UVM \. * Experience… more
- Northrop Grumman (Linthicum Heights, MD)
- …+ Experience with FPGA or ASIC + Knowledge of Universal Verification Methodology ( UVM ) + Experience with scripting languages (Bash, Perl, Python, ... for both are listed below:** **Basic Qualifications Principal Digital Verification Engineer :** + Bachelor's degree in a... FPGA or ASIC + Knowledge of Universal Verification Methodology ( UVM ) + Experience with scripting… more
- BAE Systems (Westminster, CO)
- …development environment to provide continuously evolving capabilities in space payloads. As an FPGA Verification engineer , you will work with a team ... including Xilinx Vivado/Vitis and Mentor Modelsim/Questasim. + Experience with OVM/ UVM Verification methodologies. + Ability to work...based on position level and/or job specifics. **Senior Principal FPGA Verification Engineer - $15K… more
- BAE Systems (Largo, FL)
- …may be available based on position level and/or job specifics. **Senior Principal Design Verification Engineer - FPGA - (Sign-on Bonus)** **119933BR** EEO ... your career. BAE is looking for experienced senior level FPGA Design Verification Engineers who can plan,...SystemVerilog/ UVM , OVM, and/or VHDL + Experience with FPGA /ASIC design and verification tools (Mentor Questa… more
- BAE Systems (Cedar Rapids, IA)
- …incentives may be available based on position level and/or job specifics. **Senior Engineer - ASIC/ FPGA Verification (hybrid)** **119641BR** EEO Career Site ... navigation missions. BAE is looking for experienced senior level ASIC/ FPGA Design Verification Engineers who can plan,...SystemVerilog/ UVM , OVM, and/or VHDL + Experience with ASIC/ FPGA design and verification tools (eg Siemens… more
