- NVIDIA (Santa Clara, CA)
- …machine learning, and novel algorithms in C++. We are seeking an innovative CAD Software Engineer with particular interest in strategies and algorithms for large ... Networks), and Reinforcement Learning for suggesting or automatically implementing RTL modifications. + As with any software ...implementing RTL modifications. + As with any software engineering team, we do write a lot of… more
- Siemens (Wilsonville, OR)
- …languages (Verilog, System-Verilog, VHDL) will be required. + Solid experience in RTL -to- RTL manipulation and introspection software (Parsing, Design ... Job Family: Software Req ID: 450920 Siemens EDA is a...is looking for a highly motivated, creative, and energetic engineer with expertise in digital circuit design and verification… more
- Silvus Technologies (Irvine, CA)
- …can be the next chapter of your career._ THE OPPORTUNITY Silvus is seeking a full-time Principal FPGA / RTL Design Engineer who will report to the Senior ... projects aimed at addressing challenging real-world communication needs. The Principal FPGA / RTL Design Engineer...logic analyzers. * Provide support to the RF and Software Engineering Teams. REQUIRED QUALIFICATIONS * Bachelor of Science… more
- Qualcomm (Santa Clara, CA)
- …Summary:** We are hiring a talented engineer for CPU System Debug Architecture/ RTL engineer targeted for high performance, low power devices. In this role, ... as Perl or Python. **Roles and Responsibilities** As an Architect/ RTL engineer you will own or participate...area, reliability, testability and power. * Work alongside with Software , Firmware and platform team to make CPU systems… more
- Qualcomm (San Diego, CA)
- …help create a smarter, connected future for all. As a Qualcomm GPU Engineer , you may architect, design, implement, verify, and/or optimize the performance and power ... Science, Electrical Engineering, or related field and 4+ years of Software Engineering, Hardware Engineering, Systems Engineering, or related work experience. OR… more
- Northrop Grumman (Linthicum Heights, MD)
- …of UVM + Experience developing testplans, participating in reviews, test development and RTL debug **Senior Principal Engineer Basic Qualifications:** + ... active DoD Secret clearance with Special Program Access (SAP) prior to start.** ** Principal Engineer Basic Qualifications:** + Bachelor's degree with 5 years of… more
- Northrop Grumman (Dulles, VA)
- …applications. _This is a dual level requisition which can be filled as a Principal Digital Engineer or Sr Principal Digital Engineer_ **Basic Qualifications: ... Principal Digital Engineer ** + 5 years of relevant professional experience with...Proficient in FPGA design flow including items such as RTL /gate level simulation, synthesis, place and route, static timing… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …our customers, our communities, and each other-every day. Key Responsibilities The Senior Principal Design Engineer will define the DFT Architecture for the next ... to develop and verify DFT's structures and constraints as well as perform RTL and gate level (no-timing and timing) simulations to verify DFT functionality. Finally,… more
- Micron Technology, Inc. (Richardson, TX)
- …to get difficult problems solved and turn customers' dreams into reality faster. The Senior/ Principal HBM CAD Engineer is a technical leadership role within the ... years of direct CAD or Design experience in Digital RTL to GDS Flows. + 5+ years of experience...5+ years of experience vetting and deploying sophisticated EDA software flows + 5+ years of experience qualifying vendor… more
- Cadence Design Systems, Inc. (Cary, NC)
- …with high quality. The candidate will contribute to digital architecture, digital RTL , low power design, synthesis and timing analysis, and behavioral coding for ... power, performance, and area + Drive architecture to micro-architecture to RTL implementation with the refining of features/requirements throughout the design… more
- Cadence Design Systems, Inc. (Austin, TX)
- …innovators who want to make an impact on the world of technology. As a Product Engineer , you will be part of Product Engineering team in the Digital & Signoff Group ... around the world. Job Description: + As a Product Engineer , you will be a source of technical place...ASIC design methodologies and of every stage of the RTL to GDSII flow. + Working with timing closure… more
- Cadence Design Systems, Inc. (Austin, TX)
- …GLS Experience with C/C++. Debugging disassembly assembly is a plus Experience with RTL to Post Silicon Validation DV methodologies/flows is a plus Experience with ... depends on. We are a global electronic design automation company, providing software , hardware, and intellectual property to design advanced semiconductor chips that… more
- Amazon (Cupertino, CA)
- Description We are seeking an experienced engineer to work on distributed AI/ML systems. This role involves working on collective operations - the fundamental ... an integral part of AWS and develops hardware and software components that are critical building blocks for EC2...working side by side with infrastructure experts, hardware engineers, RTL engineers, scientists & architects. Our workforce spans the… more
- Qualcomm (San Diego, CA)
- …help create a smarter, connected future for all. As a Qualcomm ASIC Engineer , you will define, model, design (digital and/or analog), optimize, verify, validate, ... across various PVTs and SoC IPs + Debug low-level software and hardware issues, utilizing various debug tools like...identify failures and performance issues, and collaborate with CAD, RTL , and Design teams to resolve them. + Automate… more
- Broadcom (San Jose, CA)
- …Description:** **Senior Custom ASIC Engineering Lead** Are you a versatile, senior engineer capable of leading external and internal cross-functional teams in areas ... industry, including AI. Our ASIC products division is looking for a senior engineer to guide Customer teams designing challenging chips in areas such as AI,… more
- Qualcomm (Folsom, CA)
- …requiring interaction with senior leadership (eg, Director level and above). ** Principal Duties and Responsibilities:** + Leverages advanced ASIC knowledge and ... on system-level requirements. + Collaborates across functional teams (eg, software architecture, hardware architecture, product management, program management teams)… more