- Qualcomm (Santa Clara, CA)
- … solutions which are setting benchmarks in the whole industry. As an SOC Verification and Methodology Engineer , you will be responsible for ensuring the ... and resolve design issues. In this role of Design Verification Engineer , you will be using advanced...verification skills & experience with assertion & coverage-based verification methodology + Knowledge of SOC… more
- Qualcomm (San Diego, CA)
- … solutions which are setting benchmarks in the whole industry. As an SOC Verification and Methodology Engineer , you will be responsible for ensuring the ... and resolve design issues. In this role of Design Verification Engineer , you will be using advanced...verification skills & experience with assertion & coverage-based verification methodology + Experience in handling … more
- Capgemini (Seattle, WA)
- **About the Job You're Considering** We are seeking a SoC Design Verification Engineer to join our team 100% onsite in either Seattle, WA or Santa Clara, CA. ... 10 years of hands-on experience with SystemVerilog and UVM methodology . + Proficiency in one or more of the...**Organization:** _ERD PPL US_ **Title:** _Senior E/E & Semiconductor Engineer - SOC Design Verification … more
- Qualcomm (Santa Clara, CA)
- …based verification skills, experience with assertions, and coverage-based verification methodology + Strong leadership, Analytical and problem-solving skills ... complex IP blocks and subsystems. **Job Responsibilities** + Lead Sub-System & SoC Design verification for Qualcomm WIFI projects + Own end-end low power test… more
- Qualcomm (San Diego, CA)
- …Engineering Group, Engineering Group > ASICS Engineering **General Summary:** As a SoC Power/Performance Post-Si Validation & Emulation Engineer , you will be ... a vital member of our Global SoC System Validation Team within the QCT organization. Your...with Static Timing Analysis and Physical Design tools & methodology . + Solid understanding of circuit and logic design… more
- Qualcomm (San Diego, CA)
- …variation. We are currently seeking an experienced candidate for the position of SoC Debug Engineer . **Key Responsibilities** In this role, the candidate will ... **General Summary:** Qualcomm's Silicon Validation team, part of the Snapdragon SoC hardware development organization, is responsible for the overall quality of… more
- Qualcomm (San Diego, CA)
- …are currently seeking a Senior candidate for the position to perform of SoC Debug Engineer for Server/Compute/Mobile chipsets. **Key Responsibilities:** In this ... + Strong Knowledge of TCU, PVT, Fmax, Vmin test methodology and hands-on experience + CPU and SoC...or related field and 6+ years of ASIC design, verification , validation, integration, or related work experience. OR Master's… more
- NVIDIA (Santa Clara, CA)
- …to join us today! NVIDIA is looking for a SOC Design Methodologies Engineer with proven hardware design and methodology expertise to join our world-class ... safety/resiliency, and power-saving logic. + Act as a "DevOps" engineer for RTL automation by developing new features and...with Unix/Linux shell scripting and Makefiles. + Experience in verification , Perl, and compiler concepts is a plus. +… more
- Qualcomm (San Diego, CA)
- …methodologies covering entire design cycle from RTL to GDS. Analyze how a new methodology will affect different phases of the design/ verification cycle and work ... domain crossing check, conformal low power check, and formal verification for IP blocks. + Work closely with technology/circuit...team to complete the IP design implementation. + Support SoC team to integrate low power / power management… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …& route and signoff) and/or experience with functional and formal verification tools/ methodology , VIP. Understanding of semiconductor manufacturing eco-systems. ... the core technology requirements in the digital implementation and/or functional/formal verification space , coordination of sales strategies and efforts across… more
- Qualcomm (San Diego, CA)
- …Engineering Group, Engineering Group > ASICS Engineering **General Summary:** As a Timing Engineer , you will play a vital role in Timing analysis targeting the ... with best-in-class methodologies, tools and technology to design innovative SOC products at the block/IP-level and at system-level in...and Tempus. + You will facilitate and drive STA methodology for Qualcomm using PT-SI, Tempus and best in… more
- BrainChip, Inc. (Laguna Hills, CA)
- …ASIC Verification Engineer primary job function is Pre-Silicon Design Verification Machine Learning IP and SOC designs using industry standard ... top-level. Collaborate with other team members to define a verification methodology and a test plan. Develop...scoreboards, and coverage collectors Build self-checking test benches for SoC blocks and chip top-level verification . Develop… more
- NVIDIA (Santa Clara, CA)
- We are now looking for a Senior Design for Debug (DFD) Architect and Methodology Engineer ! NVIDIA is seeking a DFD Architect to implement hardware and software ... solutions to debug world's leading SoC 's and GPU's. This position offers the opportunity to...at NVIDIA. + Work closely with software, architecture, design, verification , and silicon validation teams. + Train and mentor… more
- Amazon (Sunnyvale, CA)
- …Echo, and the Astro personal robot. What will you help us create? As an ASIC Methodology / CAD engineer you will create and maintain automated design flows that ... ASIC products. Key job responsibilities - Develop automated flows for improving the SoC design process - Build robust, scalable tools that help verify and validate… more
- NVIDIA (Santa Clara, CA)
- …lasting impact on the world. We need a creative individual who understand ASIC and SoC test methodology , DFT techniques, NPI and ATE test program development and ... release. The individual will turn the test methodology into ATE test method library. efficient and user...experience in the semiconductor industry. + Knowledge of silicon verification , testing and manufacturing + Have knowledge in Advantest… more
- Meta (Austin, TX)
- …to build IP and System On Chip ( SoC ) for data center applications.As a Design Verification Engineer , you will be part of a dynamic team working with the best ... a first-pass silicon success. **Required Skills:** ASIC Engineer , Design Verification Responsibilities: 1. Define and implement block/IP/ SoC verification … more
- Meta (Sunnyvale, CA)
- …to build IP and System On Chip ( SoC ) for data center applications.As a Design Verification Engineer , you will be part of a dynamic team working with the best ... a first-pass silicon success. **Required Skills:** ASIC Engineer , Design Verification Responsibilities: 1. Define and implement IP/ SoC verification … more
- Meta (Austin, TX)
- …to build IP and System On Chip ( SoC ) for data center applications.As a Design Verification Engineer , you will be part of a dynamic team working with the best ... a first-pass silicon success. **Required Skills:** ASIC Engineer , Design Verification Responsibilities: 1. Define and implement IP/ SoC verification … more
- Qualcomm (Santa Clara, CA)
- …the Invention Age - and this is where you come in as an ASIC Design Verification Engineer The team is responsible for the complete verification lifecycle, ... for digital power IP's, its testbench development using the advanced verification methodology such as SystemVerilog-UVM, coverage development, assertion model… more
- Meta (Sunnyvale, CA)
- …protocols like PCIe/Ethernet/DDR, computer architecture and NOC. 4. Define and implement IP/ SoC verification plans, build verification test benches to ... Job" online on this web page. **Required Skills:** ASIC Engineer , Design Verification Responsibilities: 1. Evaluate, develop...enable IP/sub-system/ SoC level verification . 5. Develop functional tests based on … more