- Micron Technology, Inc. (Boise, ID)
- …inspiring the world to learn, communicate and advance faster than ever. A CAD Engineer is a software development/support role focusing on semi-conductor/EDA ... Lisp will be considered + 4+ Years of professional experience in supporting ERC development; a plus if you have experience/exposure with PERC. **Education:** A… more
- Micron Technology, Inc. (Atlanta, GA)
- …to get difficult problems solved and turn customers' dreams into reality faster. The Senior /Principal CAD Memory Engineer is a technical role within the ... verification, and tape out of custom memory designs. These CAD tools and collateral enable DRAM, NAND, and other...place and route tools, physical design verification (LVS, DRC), ERC , Layout Parasitic Extraction, pre and post layout netlisting… more
- Micron Technology, Inc. (Boise, ID)
- …the world to learn, communicate and advance faster than ever. **Job Description** The Senior /Principal CAD Engineer - Parasitic Extraction is a technical ... Micron-developed process nodes! **Responsibilities** **:** + Perform day-to-day support of CAD tools, flows and collateral provided by functionally organized CAD… more
- Siemens Digital Industries Software (Fremont, CA)
- …experience with DRC (Design Rule Checking), LVS (Layout vs. Schematic), ERC (Electrical Rule Checks), PEX (Parasitic Extraction), PERC (Programmable Electrical Rule ... solutions * A working familiarity of Unix and Linux OS Prior experience with CAD scripting and rule deck languages: SVRF/TVF, Tcl/Tk, Skill, Perl, Scheme, etc * This… more
- Siemens Digital Industries Software (Fremont, CA)
- …+ Preferred Experience with IC Digital Design or Custom Layout and or related CAD skills + Preferred Experience with DRC (Design Rule Checking), LVS (Layout vs. ... Schematic), ERC (Electrical Rule Checks), PEX (Parasitic Extraction), PERC (Programmable Electrical Rule Checking) type verification flows + Preferred Experience… more
- Siemens Digital Industries Software (Wilsonville, OR)
- …in the increasingly complex world of chip, board, and system design. Electrical rule checking ( ERC ) is a methodology used to check the robustness of a design both at ... We are looking for a highly motivated software quality engineer to join the team responsible for verification and...overstress, signals crossing multiple power domains, and other advanced ERC operations. You will be part of a team… more
- Qualcomm (Santa Clara, CA)
- …Engineering Group > ASICS Engineering **General Summary:** A SOC Physical Design Engineer plays a crucial role in the development and implementation of products ... * 1+ year of work experience in a role requiring interaction with senior leadership (eg, Director level and above). **Principal Duties & Responsibilities:** *… more