- Cognichip (Redwood City, CA)
- …possible at the nexus of silicon design and machine learning. As a Staff Chip Design Engineer on our team, you'll tackle real-world scientific and ... the processes for dataset collection, curation, and enhancement. You'll fuse knowledge of chip design and ML into end-to-end silicon design flows. If you… more
- Microchip (San Jose, CA)
- Senior Technical Staff Engineer - Design for Test Company Description Are you looking for a unique opportunity to be a part of something great? Want to join ... timing closure, power analysis during test and quantifying full chip test coverage. Establish and maintain DFT design... chip test coverage. Establish and maintain DFT design and insertion guidelines and documents best practices for… more
- SQL Pager LLC (San Francisco, CA)
- Principal/Senior Staff / Staff ASIC Design Engineer (RISC-V) Client Overview Client is building the first latency optimized SoC for their industry. Using ... ( Staff ) of general experience as a CPU Design Engineer for building complex SoCs. ◦...Programmable Interrupt Controller Debug and Trace Low Power Implementation. Chip Security Cryptography Nice to have Experience in working… more
- Advanced Micro Devices, Inc. (San Jose, CA)
- …where communication and teamwork are highly valued. Key Responsibilities As an ASIC Design Engineer , your responsibilities span various aspects of SOC design ... with other specialists that are members of the SOC Design - Verification, Emulation, STA, and Physical Design...Experience Hands on experience in all aspects of the chip development process with proficiency in front end tools… more
- Advanced Micro Devices (San Jose, CA)
- …beyond. Together, we advance your career. THE ROLE: We are looking for a self‑motivated senior design engineer to be part of a leading team to drive and improve ... As a key contributor, you will focus on RTL design and validation of high‑speed interfaces such as chip ‑to‑ chip interconnect, both on system and on package,… more
- AMD (San Jose, CA)
- …beyond. Together, we advance your career. The Role We are looking for a self‑motivated senior design engineer to be part of a leading team to drive and improve ... As a key contributor, you will focus on RTL design and validation of high‑speed interfaces such as chip ‑to‑ chip interconnect, both on system and on package,… more
- Conductor (San Jose, CA)
- …including Virtuoso, Calibre LVS, DRC, SkillCad, and similar. Have experience with chip ‑level design , eg, bump, pad, and ESD strategies. Communicate effectively ... Work policy. What You'll Do As a senior high‑speed mixed‑signal layout/analog engineer , you will work with circuit designers located in San Jose, California,… more
- Flux Computing (San Francisco, CA)
- Senior / Staff Analog Design Engineer - High Speed SerDes 4 days ago Be among the first 25 applicants The Role We are seeking an experienced Analog /RF IC ... central to realising Flux's multi‑terabit‑per‑second optical fabric. Responsibilities Define, design and verify SerDes cores operating at >25Gb/s‑per‑lane, including… more
- Samsung Semiconductor, Inc. (San Jose, CA)
- Position Title: Senior Staff Engineer , Serdes Layout Design...SkillCad and so on. Desire to have experience on chip level design , like bump, pad, and ... Do As a senior high speed mixed-signal layout/analog layout engineer , you will be working with circuit designers located...policy Working with remote circuit designers to determine the chip floorplan. You need to come up with strategies… more
- Samsung Semiconductor (San Jose, CA)
- Senior Staff Engineer , Serdes Layout Design ...Calibre LVS, DRC, SkillCad, and so on. Experience on chip level design , like bump, pad, and ESD ... Work policy. What You'll Do As a senior high‑speed mixed‑signal layout/analog layout engineer , you will be working with circuit designers located in San Jose, CA… more
- Murata Electronics (San Diego, CA)
- Senior Staff Engineer , NPI Packaging R&D Location San Diego, CA, US pSemi Corporation is a Murata company driving semiconductor integration. pSemi builds on ... better. Job Summary We are seeking an experienced Senior Staff Engineer to lead pSemi's internal prototyping...assembly processes required for fully packaged, single die flip chip LGA, multi- chip modules (MCM) and System-in-Package… more
- Lightmatter (Boston, MA)
- …a cutting-edge team at the forefront of silicon photonics and high-speed transceiver design ! As a member of the analog team, you'll collaborate with our architects ... experience, education, and location. Responsibilities Support micro‑architecture development with chip architects by conducting feasibility studies Collaborate with members… more
- Murata Manufacturing Co., Ltd. (San Diego, CA)
- …thinner, faster and better. Job Summary We are seeking an experienced Senior Staff Engineer to lead pSemi's internal prototyping assembly laboratory. The ... expertise in the assembly processes required for fully packaged, single die flip‑ chip LGA, multi‑ chip modules (MCM) and System‑in‑Package devices. Assembly… more
- Amazon (San Francisco, CA)
- Sr. ASIC Design Engineer , Cloud-Scale Machine Learning Acceleration team Amazon Web Services provides a highly reliable, scalable, low-cost infrastructure ... and customers across all industries. Custom SoCs (System on Chip ) live at the heart of AWS Machine Learning...integration of emergent technologies. We're looking for an ASIC Design Engineer to help us trail‑blaze new… more
- AMD (San Jose, CA)
- …we advance your career. THE ROLE We are seeking a Senior Member of Technical Staff (SMTS) SoC Architect to join our SoC Architecture team. In this role, you will ... functions across roadmap and custom devices. You will focus on chip pervasive components, while ensuring seamless integration with processor subsystems,… more
- Flux Computing (San Francisco, CA)
- …Computing 1 day ago Be among the first 25 applicants The Role We're searching for a Senior/ Staff Analog Design Engineer to architect, design and bring to ... that will deliver on the target of Analog bandwidth > 20 GHz. Design critical high‑speed building blocks: bootstrapped or switch‑linearised T/H, low‑skew clock trees… more
- Conductor (San Jose, CA)
- …for researching and evaluating new device architectures, materials, and integration schemes through chip design metrics to meet the need of sub-2nm technology ... and explore future logic technology paths, capabilities, and applications through design /system-technology optimization (DTCO). The candidate will be a key technical… more
- Aleron (San Diego, CA)
- Overview We are looking for a highly motivated, creative and experienced ATE Test Engineer to design and implement automated test solution for RF connectivity ... SoC (System-on- Chip ) devices. This role involves developing advanced test solutions...test cost (COT) towards overall product cost. Collaborate with design and DFT teams to define test plans and… more
- Altos Labs (San Francisco, CA)
- …of explaining design , results, and impact to scientific and non‑scientific staff . Stays up‑to‑date on latest developments in deep learning and applies this ... Machine Learning Engineer / Machine Learning Scientist, Multi Modality -...optimize machine learning systems, collaborate across multidisciplinary teams, and design state‑of‑the‑art models to tackle biological questions. Responsibilities Machine… more
- Amazon (San Francisco, CA)
- Firmware Engineer , Annapurna Labs, ML Acceleration - Performance Instrumentation & Developer Tools AWS Utility Computing (UC) provides product Annapurna Labs (our ... that help our customers change the world. We are seeking a Senior Firmware Engineer to join our Power Architecture team, developing firmware algorithms for power and… more
