- US Tech Solutions (Goleta, CA)
- …AXI, JTAG preferred + Experience in analog and real number modeling preferred **Skills:** + UVM / System Verilog + Design Verification + Ethernet, SPI, ... + The project relates to the design and verification of a custom controller for...simulations + Experience in ethernet and SPI required + UVM / System Verilog experience 5+ years… more
- Cisco (San Jose, CA)
- …combined with 5 years of related experience * Experience in System Verilog / UVM . * Experience with ASIC design and verification processes, debugging, ... with outstanding talent and vast ASIC development expertise in design , DV, DFT, physical design , and post-silicon...micro-architects, front-end designers, and verification engineers. Cisco is a system company, so you can also use the ASIC… more
- Texas Instruments (Dallas, TX)
- …of Analog Mixed Signal products utilizing self checking test benches in System Verilog . + Prior management and/or leadership experience **Preferred ... qualifications:** + Extensive knowledge in Verilog , SystemVerilog, UVM Verification environments with metric...Maestro + Experience writing models for analog circuits and systems , either in Verilog AMS or real… more
- Qualcomm (San Diego, CA)
- …and tools. + Creates and maintains verification test benches and environments in System Verilog / UVM + Create and leverage advanced testing frameworks ... experience + Verification skills: Test planning, Scripting, Simulation, problem solving and debug. + System Verilog , UVM , Verilog or VHDL, C/C++ skills… more
- Texas Instruments (Dallas, TX)
- …related field + 5+ years of Analog Mixed Signal verification experience utilizing System Verilog **Preferred qualifications:** + Experience using Verilog , ... for TI's largest customers. You will work closely with design , systems , characterization, test and product engineers...SystemVerilog, Verilog -A, Verilog -AMS, Python, UVM , Cadence ADE-L/ADE-XL or Maestro + Strong background with… more
- BAE Systems (Westminster, CO)
- …Solid electronic circuit design and electronic systems background. + Expertise in VHDL/ Verilog and System Verilog . + Experience with FPGA design ... processor systems . + Demonstrated technical leadership skills in FPGA design . + Experience with OVM/ UVM Verification methodologies. + Experience developing… more
- Broadcom (Broomfield, CO)
- …evolve rapidly at every generation in a very dynamic market using industry proven methodologies using System Verilog and UVM . You can become a member of an ... of a stable team developing silicon products for Ethernet systems in the Cloud? Come join this team creating... UVM , well versed in OOP_** **_T_** **_ools/Languages: System Verilog (TB structures - Class, SVA,… more
- BAE Systems (Westminster, CO)
- …Solid electronic circuit design and electronic systems background. + Expertise in VHDL/ Verilog and System Verilog . + Experience with FPGA design ... learning and strong execution. **What You ll Do:** + Apply innovative design techniques to create defense-oriented, cutting-edge electronic systems . + Work… more
- Arrow Electronics (Sunnyvale, CA)
- …**Job Description:** **What candidate will Be Doing:** + At-least 8+ years of experience in System Verilog HVL and C++/C + At-least 8+ year of experience in ... **Position:** Design Verification Engineer (eInfochips Inc) **Job Description:** **Role:...Looking For:** + At-least 8+ years of experience in System Verilog HVL and C++/C + At-least… more
- Lockheed Martin (Orlando, FL)
- …discipline, or equivalent experience/combined education \- HDL programming experience with VHDL, Verilog , and/or System Verilog \- Experience in ... **Description:** You will be an FPGA Design Engineer for our team, responsible for designing,...Our team is responsible for creating innovative video processing systems that drive business growth and customer satisfaction\. **What… more
- The Boeing Company (Tukwila, WA)
- …Experience with hardware emulators, especially Palladium + Proficiency with hardware verification languages: System Verilog , System Verilog Assertions + ... scoreboards + Drive FPGA-based prototyping and validation depending on program and system requirements and complexity + Validate design through hardware… more
- Lockheed Martin (Grand Prairie, TX)
- …discipline, or equivalent experience/combined education \- HDL programming experience with VHDL, Verilog , and/or System Verilog \- Experience in ... FPGA Engineering Lead for our team, responsible for leading the architecture design , development, and implementation of video processing systems using… more
- BAE Systems (Westminster, CO)
- …Verification development methodology. + Experience with System Verilog and UVM , and familiarity with electronic circuit design and electronic systems ... strong execution. **What You ll Do:** + Apply innovative design techniques to create defense-oriented, cutting-edge electronic systems...be used across multiple projects. + Work in a System Verilog / UVM environment developing tests,… more
- Meta (Sunnyvale, CA)
- …Requires 5 years of experience in the following: 10. 1. Experience in HDL language ( System Verilog , or Verilog ), and scripting language (TCL, Python, Perl, ... (or foreign degree equivalent) in Computer Science, Engineering, Information Systems , Analytics, Mathematics, Physics, Applied Sciences, or a related...or Shell-scripting) 11. 2. Design Verification in Verification methodologies ( UVM or… more
- Leidos (Arlington, VA)
- …a FPGA DSP Firmware Design Engineer to work with a multi-disciplined design team (electrical engineers, systems engineers, scientists, etc) to design , ... on customer requirements and/or MATLAB model(s). * Collaborate with a multi-disciplined design team (electrical engineers, systems engineers and scientists) to … more
- Amazon (Sunnyvale, CA)
- …5+ years or more of practical semiconductor design verification experience including System Verilog , UVM , assertions and coverage driven verification. - ... Description As a Design Verification (DV) Engineer, you will be part...UVM test bench, FPGA, emulator, software environments and system testing - Track record of defining verification methodologies… more
- Meta (Sunnyvale, CA)
- …of hands-on experience in Verilog , SystemVerilog, C/C++ based verification and UVM methodology. 9. 3+ years experience in IP/sub- system and/or SoC level ... entire stack, from transistor, through architecture, to firmware, and algorithms. As a Design Verification Engineer at Meta Reality Labs, you will work with a… more
- Meta (San Diego, CA)
- …of hands-on experience in Verilog , SystemVerilog, C/C++ based verification and UVM methodology. 10. 5+ years experience in IP/sub- system and/or SoC level ... the entire stack, from transistor, through architecture, to firmware, and algorithms.As a Design Verification Engineer at Meta Reality Labs, you will work with a… more
- Lockheed Martin (Orlando, FL)
- …discipline, or equivalent experience/combined education \- HDL programming experience with VHDL, Verilog , and/or System Verilog \- Experience in ... designs * Utilize prior experience with Microchip FPGAs, Xilinx FPGAs, UVM , and GitLab to support FPGA design and development **Why Join Us** Do you want to be… more
- Micron Technology, Inc. (Richardson, TX)
- …on future HBM solutions. **How To Qualify:** + Ability to develop validation environments using System Verilog and UVM . + Ability to write tests using ... As an HBM SOC Pre-Silicon Verification Engineer, you will be responsible for the design & development of next-generation HBM DRAM products. You will be part of a… more