• BOEING (Hazelwood, MO)
    …for professional growth. Find your future with us. Boeing AvionX has an exciting opportunity UVM Advance Verification FPGA Engineer at Lead or Senior ... company and around the world. Position Responsibilities: * Perform UVM Advance Verification on single or multi- FPGA programs working on small or large… more
    Get It 2025 (11/21/25)
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  • Elect Design and Analy Engr

    US Tech Solutions (Mesa, AZ)
    **Job Description:** + Client AvionX has an exciting opportunity UVM Advance Verification FPGA Contractor at Lead or Senior level to join us as part of ... company and around the world. **Position Responsibilities:** + Perform UVM Advance Verification on single or multi- FPGA programs working on small or… more
    US Tech Solutions (11/19/25)
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  • FPGA Design Verification Engineer

    Actalent (Wayne, NJ)
    FPGA Design Verification Engineer - DoD Secret Clearance Job Description The role involves the design verification of VHDL developed for an FPGA , ... and coverage closure. The code will be developed using SystemVerilog/Universal Verification Methodology (SV/ UVM ) following established styles and best practices.… more
    Actalent (11/20/25)
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  • Fpga Engineer

    Actalent (Baltimore, MD)
    …degree in Electrical/Computer Engineering * 7+ years' experience in FPGA verification * Expert knowledge of SystemVerilog and UVM * Experience with ... will develop and implement comprehensive verification strategies for complex FPGA SoC designs. Key Responsibilities: * Develop UVM -based verification more
    Actalent (11/18/25)
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  • FPGA Engineer

    Actalent (Plano, TX)
    …or Computer Science. + Minimum of 4 years of hands-on experience in FPGA design and development. + Simulation/ verification + Strong understanding of high-speed ... and DSP domain with Verilog/SystemVerilog and/or VHDL. + Proficient in using FPGA design- verification tools from vendors such as Xilinx/AMD or Altera/Intel,… more
    Actalent (11/20/25)
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  • New College Grad - Engineer, Electrical Design…

    Micron Technology, Inc. (Boise, ID)
    …like Siemens ModelSim/QuestaSim, AMD/Xilinx Vivado, or Altera/Intel Questa + Knowledge of UVM methodology for verification . + Expertise in laboratory debug ... of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. **Job Description** As an Electrical Design Engineer -… more
    Micron Technology, Inc. (10/25/25)
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  • Fpga Design Engineer

    Actalent (Herndon, VA)
    FPGA Design Engineer *Active Secret Clearance* Job Description We are seeking a FPGA /ASIC Design Engineer responsible for the architecture, implementation, and ... verification /validation through software integration tests for the delivery of...Write and debug tests/sequences for end-to-end simulation using the UVM framework with System Verilog Assertions. + Conduct SW… more
    Actalent (11/08/25)
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  • Senior IP Verification Engineer

    NVIDIA (Santa Clara, CA)
    …analysis + Functional and code coverage tracking and closure + Help the team advance verification techniques and methodology + IP integration testing into full ... We are now looking for a Senior Verification Engineer! NVIDIA has been transforming computer graphics,...product features + Verify IP's using System Verilog and UVM + Build testbenches and enhance flows for automation… more
    NVIDIA (09/23/25)
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  • Hardware Design Engineer

    Leidos (St. Petersburg, FL)
    …multi-disciplinary design team. This role will also support integration, test, and verification in the final products. Primary Responsibilities: + Collaborate with a ... card assemblies (CCA's) containing Programmable Logic Devices (RFSoC, SoC, FPGA ), data conversation, signal processing/filtering, high speed digital and analog,… more
    Leidos (11/18/25)
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  • Senior Test and Integration Engineer

    Leidos (Linthicum, MD)
    … and testing of new ASIC designs prior to fabrication using Field Programmable Gate Arrays ( FPGA ) to emulate the chips. + (U//FOUO) Write custom interfaces ... off the Shelf (COTS) software and Mentor Graphics products. + Use advanced verification methodologies using industry standard UVM (Unified Verification more
    Leidos (11/07/25)
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