• ASIC and SoC System

    Google (Sunnyvale, CA)
    …into our cutting-edge data centers affecting millions of Google users. As an ASIC and SoC System Level Test Engineer, you will help to integrate SoC ... experience with bench, high-volume manufacturing (HVM) system level test, or hardware testing systems , test,...test, and flow development. + Experience with hardware, PCBA, ASIC , or SoC prototype bring-up, debug, functional… more
    Google (04/25/24)
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  • SOC / ASIC Synthesis & Front-End STA…

    SpaceX (Sunnyvale, CA)
    SOC / ASIC Synthesis & Front-End STA Engineer (Silicon Engineering) at SpaceX Sunnyvale, CA SpaceX was founded under the belief that a future where humanity is out ... the ultimate goal of enabling human life on Mars. SOC / ASIC SYNTHESIS & FRONT-END STA ENGINEER (SILICON...to deploy Starlink, the world's most advanced broadband internet system . Starlink is the world's largest satellite constellation and… more
    SpaceX (05/09/24)
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  • FPGA/ ASIC Design Engineer (Silicon…

    SpaceX (Irvine, CA)
    …curious engineer who will work alongside world-class cross-disciplinary teams ( systems , firmware, architecture, design, validation, product engineering, ASIC ... of experience working with ASICs and/or FPGAs PREFERRED SKILLS AND EXPERIENCE: + ASIC /FPGA system integration experience + Software design and development skills… more
    SpaceX (05/02/24)
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  • ASIC Design Engineer, System

    NVIDIA (Santa Clara, CA)
    …Floorsweep, In-silicon measurement, Reset, Sysctrl) + RTL design, synthesis, timing + Silicon bring-up + SOC level integration What we need to see: + BS / MS in ... chance to work on architecture, design and synthesis for System - level modules for complex GPU and Tegra...from the crowd: + Familiarity with ARM CPU and SoC system architecture, microprocessor, and microcontroller fundamentals… more
    NVIDIA (05/10/24)
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  • ASIC Engineer, Design Verification

    Meta (Austin, TX)
    …success' in ASIC development cycles 9. 3+ years experience in block/IP/sub- system and/or SoC level verification based on SystemVerilog UVM/OVM ... **Summary:** Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization.... verification plans, build verification test benches to enable block/IP/sub- system / SoC level verification 2. Develop… more
    Meta (04/25/24)
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  • ASIC Engineer, Design Verification

    Meta (Austin, TX)
    …implement IP/ SoC verification plans, build verification test benches to enable IP/sub- system / SoC level verification 2. Develop functional tests based on ... **Summary:** Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization....and/or C/C++ based verification 10. 10+ years experience in IP/sub- system and/or SoC level verification… more
    Meta (03/22/24)
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  • ASIC Engineer, Design Verification

    Meta (Sunnyvale, CA)
    …implement IP/ SoC verification plans, build verification test benches to enable IP/sub- system / SoC level verification. 2. Develop functional tests based on ... **Summary:** Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization.... development cycles. 10. 5+ years of experience in IP/sub- system and/or SoC level verification… more
    Meta (03/22/24)
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  • Next-Gen, High-Speed Memory Subsystem, Low-power…

    Qualcomm (San Diego, CA)
    …+ Strong working knowledge in the entire low power, high performance ASIC / SoC design flows (micro-architecture, RTL design, verification, synthesis, timing/STA, ... company in the world. Qualcomm is looking for bright ASIC engineers with excellent analytical and technical skills, and...This is a great opportunity to join a fast-paced SoC team responsible for development of next Generation, high… more
    Qualcomm (04/24/24)
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  • Sr. FPGA/ ASIC Design Engineer (Silicon…

    SpaceX (Redmond, WA)
    …to solve complex problems including clock domain crossings and power optimization + ASIC / SoC system integration experience + Experience with high reliability ... curious engineer who will work alongside world-class cross-disciplinary teams ( systems , firmware, architecture, design, validation, product engineering, ASIC more
    SpaceX (05/02/24)
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  • ASIC Engineering Manager, Design…

    Meta (Sunnyvale, CA)
    …silicon development experience, and a proven track record of first-pass success in ASIC and Systems . **Required Skills:** ASIC Engineering Manager, Design ... or equivalent practical experience 11. 10+ years experience managing ASIC / SoC design verification teams at the Director... design verification teams at the Director or Manager level 12. Clear understanding of complexities involved with various… more
    Meta (03/22/24)
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  • Senior ASIC Design Engineer, Hardware…

    Amazon (Sunnyvale, CA)
    …and design hardware accelerator IP in Verilog HDL - Help define and own ASIC design methodologies - Lead cross functional SOC development activities - Work ... Description As a Sr. ASIC Design Engineer, you work with a team...vision and robotics. You will work closely with scientists, SoC Architects, software and verification to develop IP that… more
    Amazon (04/09/24)
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  • ASIC Verification Engineer

    Cisco (San Jose, CA)
    … Verilog and UVM methodology * Experience in verifying complex blocks, clusters and top level for SoC * Can build testbenches from scratch, hands on experience ... be in the Silicon One development organization as an ASIC design verification engineer in San Jose, CA. You...hands-on experience in RTL verification and in-depth knowledge of SoC development cycle and the best industry practices, from… more
    Cisco (04/21/24)
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  • Senior ASIC Design Engineer - Displays

    NVIDIA (Santa Clara, CA)
    …to accomplish your tasks. + Support the bring-up of various features at a system level in various pre-silicon platforms like SOCV, Emulation, FPGA. + Support ... We are now looking for a Display ASIC Design Engineer! NVIDIA is seeking a passionate...craft and implement display subsystem in the world's leading SoC 's and GPU's. This position offers the opportunity to… more
    NVIDIA (04/04/24)
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  • ASIC Engineer, Formal Verification

    Meta (Austin, TX)
    …close coverage with targeted Formal Verification Techniques at IP, Subsystem and SoC level 5. Build reusable/scalable environments for Formal Verification and ... **Summary:** Meta is hiring ASIC Formal Verification Engineer within the Infrastructure organization....with experience in Formal Verification to build IP and System On Chip ( SoC ) for data center… more
    Meta (04/06/24)
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  • ASIC Design Verification Engineer (Santa…

    Qualcomm (San Diego, CA)
    …Engineer The team is responsible for the complete verification lifecycle, from system - level concept to tape out and post-silicon support. The responsibility ... UVM, system verilog, assertion, C++, python **Technology:** DDR, CACHE, SOC **Minimum Qualifications:** * Bachelor's degree in Science, Engineering, or related… more
    Qualcomm (03/14/24)
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  • ASIC Design Engineer

    SLAC National Accelerator Laboratory (Menlo Park, CA)
    …strengthen its capabilities in analog/mixed signal design to implement the next generation system -on-chip ( SoC ) ASICs. As mixed signal designer you will be ... + Floor planning, layout design and physical verification of active circuits. + Top- level simulations to validate ASIC integration. + Document design towards… more
    SLAC National Accelerator Laboratory (04/10/24)
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  • Sr. ASIC Design Engineer, DDR IP (Silicon…

    SpaceX (Sunnyvale, CA)
    …curious engineer who will work alongside world-class cross-disciplinary teams ( systems , firmware, architecture, design, validation, product engineering, ASIC ... Sr. ASIC Design Engineer, DDR IP (Silicon Engineering) at...to deploy Starlink, the world's most advanced broadband internet system . Starlink is the world's largest satellite constellation and… more
    SpaceX (03/29/24)
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  • Senior ASIC Verification Engineer

    NVIDIA (Santa Clara, CA)
    …Team is committed to deliver high-quality clocking and reset logic to various units in SOC and GPU ASIC . The complexity of the clocks and resets design has ... doing: + Own validation of Clocking structures in Tegra SOC GPU ASIC products from start to...profiling tools, X prop, etc. + Exposure on block level and system - level verification. +… more
    NVIDIA (05/10/24)
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  • ASIC Rtl Design Engineer, Machine Learning…

    Google (Sunnyvale, CA)
    …powerful computing infrastructure. You develop from the lowest levels of circuit design to large system design and see those systems all the way through to high ... . + Work independently and collaboratively to create and review ASIC / SoC subsystem design architecture and microarchitecture specifications. + Develop… more
    Google (05/02/24)
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  • ASIC Verification Engineer - GPU

    NVIDIA (Santa Clara, CA)
    …debug tools like Verdi, GDB) + Experience crafting test bench environments for unit and system level verification + Strong background in System Verilog or ... NVIDIA is seeking elite ASIC Verification Engineers to verify the design and...verify the design and implementation of the world's leading SoC 's and GPU's. This position offers the opportunity to… more
    NVIDIA (04/16/24)
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