- Cadence Design Systems, Inc. (San Jose, CA)
- …Fundamentals, Semiconductor fundamentals, and Static Timing Analysis is required Prior experience with IC digital implementation flows and backend EDA tools ... Science/Engineering, Electrical, Engineering, or related field Prior experience with IC digital implementation flows and back-end EDA tools including… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …Engineer responsible for providing pre-sales and post-sales technical support for the Digital Implementation and Signoff tools. Will work closely with customers ... proliferation at existing customers (on/offsite), to help drive business for our digital implementation tools + Working closely with R&D on tools and methodology… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …Semiconductor fundamentals, and Static Timing Analysis is required. Prior experience with IC digital implementation flows and front-end EDA tools ... Power Characterization. Lead technical campaigns and strategies in the Frontend digital implementation space. Aggressively push Power, Performance, and Area… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …Semiconductor fundamentals, and Static Timing Analysis is required + Prior experience with IC digital implementation flows and backend EDA tools including ... Science/Engineering, Electrical, Engineering, or related field + Prior experience with IC digital implementation flows and font-end EDA tools including… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …Fundamentals, Semiconductor fundamentals, and Static Timing Analysis is requiredPrior experience with IC digital implementation flows and backend EDA tools ... degree Computer Science/Engineering, Electrical, Engineering, or related fieldPrior experience with IC digital implementation flows and font-end EDA… more
- Lightmatter (Mountain View, CA)
- …photonics based artificial intelligence accelerators and interconnect products. As a Principal System Architect, you will be responsible for defining system ... will work closely with our hardware and software teams, including mechanical, packaging, IC engineering, test and validation to design and build leading edge system… more
- Qualcomm (Santa Clara, CA)
- …all. As a Qualcomm ASIC Engineer, you will define, model, design ( digital and/or analog), optimize, verify, validate, implement, and document IP (block/SoC) ... requiring interaction with senior leadership (eg, Director level and above). ** Principal Duties & Responsibilities:** * Leverages advanced ASIC knowledge and… more
- Qualcomm (Santa Clara, CA)
- …all. As a Qualcomm ASIC Engineer, you will define, model, design ( digital and/or analog), optimize, verify, validate, implement, and document IP (block/SoC) ... requiring interaction with senior leadership (eg, Director level and above). ** Principal Duties and Responsibilities:** * Leverages advanced ASIC knowledge and… more