• Principal Design Verification

    Microsoft Corporation (Mountain View, CA)
    …Azure cloud servers, clients, and augmented reality. We are looking for a ** Principal Design Verification Engineer ** to work in the dynamic Microsoft ... complex and high-performance functions in an extremely efficient manner. + Own or lead verification of complex flows at the SOC , subsystem, or IP levels +… more
    Microsoft Corporation (02/09/24)
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  • Principal System On Chip Integration…

    Microsoft Corporation (Sunnyvale, CA)
    …Computing Development Team is seeking passionate, driven, and intellectually curious ** Principal System On Chip Integration Engineer ** to deliver premium-quality ... represent a variety of disciplines including, but not limited to, design, verification , performance modeling and DevOps supporting the development of custom silicon.… more
    Microsoft Corporation (02/23/24)
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  • Principal Front End Design Methodology…

    Microsoft Corporation (Mountain View, CA)
    …Azure cloud servers, clients, and augmented reality. We are looking for a ** Principal Front End Design Methodology Engineer ** to work in the dynamic ... End RTL methodologies for multiple SOCs + Thorough understanding of end-to-end SOC design cycles and dependencies between design, verification , physical design,… more
    Microsoft Corporation (02/16/24)
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  • ASIC Design Verification Engineer

    Qualcomm (Santa Clara, CA)
    …Python scripting + Assertion-based verification + Functional coverage As a Design Verification Engineer , you will work with Chip Architects to validate the ... requirements. **Qualifications:** Minimum Experience Level should be 2+ years in SOC -level verification with good understanding of debugging either ARM-based… more
    Qualcomm (02/16/24)
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  • Principal E/E & Semiconductor…

    Capgemini (San Jose, CA)
    …their journey towards Intelligent Industry. Capgemini Engineering has more than 55,000 engineer and scientist team members in over 30 countries across sectors ... during the interview process and that image may be used for verification , including during the hiring and onboarding process. Applicants for employment in… more
    Capgemini (03/28/24)
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  • Principal Firmware Engineer

    Cadence Design Systems, Inc. (San Jose, CA)
    …detailed product definitions and test/release plans for every Cadence product. POSITION DETAILS Principal Firmware Engineer (T4) This is an opportunity to join a ... you think about and use IP in your system-on-chip ( SoC ) designs. As you use more IP to fortify...portfolio and many industry firsts in design IP and verification IP. Engineers choose Cadence when they want the… more
    Cadence Design Systems, Inc. (01/13/24)
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  • Principal Electrical Engineer

    Microsoft Corporation (Mountain View, CA)
    …of custom and off the shelf silicon** : Evaluate System on Chip ( SoC ) and key components based on performance, memory bandwidth, and interface capabilities, ... years experience in systems integration of consumer electronics with emphasis on SOC , camera, display, power, standard PC interfaces. **Other Requirements** + This… more
    Microsoft Corporation (03/26/24)
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  • Principal Design Engineer

    Microsoft Corporation (Mountain View, CA)
    …Azure cloud servers, clients, and augmented reality. We are looking for a Principal Design Engineer to work in the dynamic Microsoft Artificial Intelligence ... specification, Register Transfer Level (RTL) design, synthesis, and System on Chip ( SOC ) integration on different subsystems. Throughout the program you will be… more
    Microsoft Corporation (02/21/24)
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  • Principal Custom Chip Lead

    NVIDIA (Santa Clara, CA)
    NVIDIA is hiring a Principal SoC Chip Lead to develop the next generation custom SoC and platform solutions. We are looking for special individuals with ... + Lead and align program multi-functional development of IP, SOC design, verification , RTL2GDS, packaging, validation, software,...are growing fast. If you're a creative and autonomous engineer , we want to hear from you. The base… more
    NVIDIA (03/07/24)
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  • Principal Silicon Validation…

    Cadence Design Systems, Inc. (San Jose, CA)
    …and provide professional guidance to customers. + Support DDR PHY and controller SOC integration reviews, and integration questions. + Perform and help debug RTL and ... working with DDR5/4, LPDDR5/4 IP. + Verilog RTL design and gate level verification experience. + Synthesis and STA experience, back-end experience is a plus +… more
    Cadence Design Systems, Inc. (03/01/24)
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  • Virtual Protocols Lead Emulation Engineer

    Cadence Design Systems, Inc. (San Jose, CA)
    …customers working on advanced SOC and System designs Position The Virtual Protocol Principal Product Engineer has the opportunity to be an expert in many ... impact on the world of technology. This Lead Emulation Engineer position is with the Virtual Protocols Product Engineering...products to enable the critical shift-left of System Level SOC verification and Validation for Cadence customers.… more
    Cadence Design Systems, Inc. (03/01/24)
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  • CAD Implementation Engineer

    Qualcomm (Santa Clara, CA)
    …experience with scripting tools and programming languages: Python and TCL preferred. ** Principal Duties and Responsibilities:** + Product Engineer for the ... design teams. **This role's responsibilities will include:** + Improve the SoC Implementation methodology for diverse Mobile, Compute, AI, IoT Snapdragon chips.… more
    Qualcomm (03/19/24)
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  • Staff Engineer

    Qualcomm (Santa Clara, CA)
    …Science, Engineering, or related field and 4+ years of ASIC design, verification , validation, integration, or related work experience. OR Master's degree in Science, ... Engineering, or related field and 3+ years of ASIC design, verification , validation, integration, or related work experience. OR PhD in Science, Engineering, or… more
    Qualcomm (03/14/24)
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  • Digital Design Engineer

    Qualcomm (Santa Clara, CA)
    …that meet the area and power targets . Working with the verification engineers to develop unit-level and integrated-level test-benches . Debugging the designs ... Synthesis and gate-level timing tasks related to the designed module and assist with verification and timing of the entire chip . Design quality check such as lint,… more
    Qualcomm (03/04/24)
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  • RF/Analog IC Design Engineer

    Qualcomm (Santa Clara, CA)
    …Define, design and develop complex radio frequency integrated circuits in complex SoC 's and discrete RFIC's. Perform radio signal path and circuit topology analysis ... for wireless products (eg, LNA's, PLL's) and 2+ years of ASIC design, verification , or related work experience. OR Master's degree in Electrical Engineering or… more
    Qualcomm (02/21/24)
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