- Qualcomm (San Jose, CA)
- …candidates who will be responsible for the implementation and verification of DFT /DFD (Design for Test/Design for Debug) techniques for low power, multi voltage ... designs. The candidate should have solid hands-on experience with industry standard DFT techniques such as scan and MBIST. Job responsibilities include DFT … more
- Amazon (Sunnyvale, CA)
- …Neural Edge that is powering the latest generation of Echo devices is looking for a Senior DFT Engineer to continue to innovate on behalf of our customers. ... logic design, verification, test patterns generation, chip bring-up and more. As a DFT Engineer , you will impact and see the device through its entire lifecycle,… more
- NVIDIA (Santa Clara, CA)
- …Make the choice to join us today. We are now looking for a highly motivated DFT Engineer to join this dynamic and innovative hardware team at NVIDIA. Our ... team works on groundbreaking innovations involving crafting creative solutions for DFT architecture, verification and post-silicon validation on some of the… more
- NVIDIA (Santa Clara, CA)
- …NVIDIA works on groundbreaking innovations involving crafting creative solutions for DFT architecture, verification and post-silicon validation on some of the ... + In addition, you will help develop and deploy DFT methodologies for our next generation products. + You...are growing fast. If you're a creative and autonomous engineer with real passion for technology, we want to… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …to make an impact on the world of technology. Looking for Lead SoC/ASIC Digital Design Engineer with experience in Design for Test ( DFT ). Ability to lead from ... in SoC/ASIC Digital Design with focus on Design for Test ( DFT ) + Should be able to lead DFT in projects from architecture to silicon debug + Should possess… more
- SpaceX (Sunnyvale, CA)
- …to work extended hours and weekends as needed COMPENSATION & BENEFITS: Pay range: DFT Engineer / Senior : $170,000.00 - $230,000/per year Your actual level and ... Sr. ASIC/SOC DFT Engineer (Silicon Engineering) at SpaceX Sunnyvale, CA SpaceX was founded under the belief that a future where humanity is out exploring the… more
- Siemens Digital Industries Software (Fremont, CA)
- …BSCS required; MSEE desired * 6 to 15 years of experience as an Applications Engineer or related field * Digital design experience and RTL coding with Verilog or ... Microsoft Office products * Ideal candidate has experience with Siemens Tessent DFT products * Project management experience * Normal office environment. *… more
- NVIDIA (Santa Clara, CA)
- …professional solution markets. What you'll be doing: + Develop and Qualify system level DFT features on our GPU's and SOC's. Prototype DFT features on silicon, ... + Work closely and proactively with other engineering teams such as DFT design team, system architects, chip and board designers, software/firmware engineers, HW/SW… more
- NVIDIA (Santa Clara, CA)
- We are now looking for a DFT Methodology Engineer ! NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 sparked the ... NVIDIA works on groundbreaking innovations involving crafting creative solutions for DFT architecture, verification and post-silicon validation on some of the… more
- Microsoft Corporation (Mountain View, CA)
- …sites within the Microsoft silicon engineering organization. We are looking for a ** Senior Silicon Engineer ** to join our team! **Microsoft's mission is to ... hierarchical and block-level partitions between RTL, Design for Testability ( DFT )-inserted RTL and Gate-level/Power-Ground (PG) Connected netlists on Microsoft's… more
- NVIDIA (Santa Clara, CA)
- …work, to amplify human inventiveness and intelligence. What you'll be doing: + Drive DFT /Test timing for innovative GPUs, CPUs, and SoCs at cluster level and/or full ... chip level + Work on all aspects of DFT /Test timing such as timing constraints, timing analysis, timing...to stand out from the crowd: + Experience with DFT timing closure for various modes eg scan shift,… more
- NVIDIA (Santa Clara, CA)
- …design tradeoffs and methodology on next generation CMOS technology. We are looking for a Senior ASIC Timing Engineer to join our dynamic and growing team! If ... frequency and power/area/congestions/yield/etc. + Work on all aspects of DFT /Test timing such as timing constraints, timing analysis, timing...to stand out from the crowd: + Experience with DFT timing closure for various modes eg scan shift,… more
- NVIDIA (Santa Clara, CA)
- …looking for a motivated Senior ASIC Physical Design PPA (Performance, Power, Area) Engineer to join our dynamic and growing team. If you are looking for a ... address those + Familiarity with logic synthesis, equivalence checking, DFT , Floorplanning, Place & Route, and ECO implementation methodology...of ASIC design, collaborate and work with Arch, RTL, DFT , and physical design teams Ways to stand out… more
- NVIDIA (Santa Clara, CA)
- …work, to amplify human inventiveness and intelligence. We are seeking an innovative Senior Timing Methodology Engineer to help drive sign-off strategies for the ... + Interacting with various teams like PNR, IR drop, DFT , lP etc to come with requirements which impact...design with FinFET technology 5nm/3nm/2nm and beyond. Understanding of DFT , IR drop, power integrity and STA. + Hands… more
- NVIDIA (Santa Clara, CA)
- …complex challenges across diverse industries. NVIDIA Silicon Solutions Group is seeking a versatile engineer to be part of the HW ArchDev team. The SSG team is ... and manufacturability. + Collaborate and Lead: Collaborate across System Architecture, DFT , ASIC, SW/FW, platform, validation, and production teams throughout the… more
- NVIDIA (Santa Clara, CA)
- …characterization problems. + Cross functionally lead efforts with design, foundry, DFT , test, Planning and quality to root-cause and solve technical problems. ... characterization and qualification. + Knowledgeable in ATE test flows, DFT and device physics. + Proficient in statistical data...industry's best employers. If you're a creative and autonomous engineer with a real passion for technology, we want… more
- NVIDIA (Santa Clara, CA)
- We are now looking for a motivated Physical Design and Timing Engineer to join our dynamic and growing team. If you want to challenge yourself and be a part of ... background in implementing them through ECOs. + Understanding of DFT logic and hands-on experience in design closure. +...timing convergence, this is a plus + Experience with DFT timing closure for various modes eg scan shift… more
- Power Integrations (San Jose, CA)
- …specifications and procedures for new product development. + Work with design/ DFT /product engineering teams to define ATE test strategy and specifications. + ... years of semiconductor Test Engineering experience with analog-mixed signal products, DFT and test plan responsibility, production support, and new product… more
- NVIDIA (Santa Clara, CA)
- NVIDIA is looking for a Senior ASIC Design Engineer for our Memory Controller team! As a Senior ASIC Engineer , you'll join a group of hard-working ... + BS, MS, or PhD in Electrical Engineering, Computer Engineer , or related degree required (or equivalent experience) +...stages in the ASIC design flow including emulation, prototyping, DFT , timing analysis, floor planning, ECO, bring up &… more
- NVIDIA (Santa Clara, CA)
- We are now looking for a Senior ASIC Design Engineer for Memory Controllers. As a Senior Designer at NVIDIA, you'll join a group of hardworking engineers to ... need to see: + BS or equivalent experience in Electrical Engineering or Computer Engineer or related degree required, advanced degrees (MS, PhD) a plus. + 5+ years… more