- Qualcomm (San Diego, CA)
- …applications. QCT mixed-signal design team consists of architects and ASIC designers, protocol experts, signal processing engineers, and algorithm designers ... Design General Summary: Job Description QCT mixed-signal IP design team is looking for talented...by course selections and/or work experience. Experience working with ASIC design tools such as Cadence Virtuoso.… more
- ForwardEdge ASIC (a Lockheed Martin Company) (St. Paul, MN)
- Description Summary: ForwardEdge ASIC is seeking a skilled silicon Validation Engineer specializing in analog and mixed signal testing to be involved in a ... and validate ASIC circuits (including ADC, I/O, SERDES, and LDO IP ) across specified performance range to identify circuit marginality and fail points. Analyze… more
- Microchip Technology (San Jose, CA)
- …integrations into Microchip FPGA products Work on architecture & implementation for Analog, ASIC & FPGA design development, integration, and deployment for high ... People come to work at Microchip because we help design the technology that runs the world. They stay...disciplines 12+ years of industrial experience Proven experience in ASIC & FPGA IP development, integration, and… more
- Qualcomm (San Diego, CA)
- …specific part of a block/SoC or IC Package. Writes technical documentation for CAD/EDA/ IP / ASIC projects. Develop scalable automation solutions in the area of RTL ... (digital and/or analog), optimizing, verifying, validating, implementing, and documenting of IP (block/SoC) development for a variety of high performance, high… more
- Advanced Technology Innovation Corp. (Bethlehem, PA)
- FPGA Design Engineer Architecture, implementation, verification/validation of Xilinx FPGAs. Experience with high speed protocols(10G-400G Ethernet, NVM, PCI). ... TCP/ IP , and IP development & integration for...for ARM SOC FPGAs. Implementation of complex algorithms targeting ASIC /FPGAs. Strong skills in VHDL, and FPGA design… more
- Advanced Micro Devices, Inc (Santa Clara, CA)
- …(SerDes) channel. THE PERSON: In this role, you will closely collaborate with Silicon IP team, ASIC packaging team, PCB team, System Architect and external ... together we advance_ THE ROLE: As a Signal Integrity Engineer in Networking Technology & Solutions Group (NTSG), you...to validate the channel health for IEEE compliance Execute Design of Experiments (DOE) sweeping to statistically evaluate the… more
- Meta (Sunnyvale, CA)
- …first-pass silicon success. **Required Skills:** ASIC Engineer , Design Verification Responsibilities: 1. Define and implement IP /SoC verification plans, ... **Summary:** Meta is hiring ASIC Design Verification Engineer ...organization. We are looking for individuals with experience in Design Verification to build IP and System… more
- Meta (Menlo Park, CA)
- …first-pass silicon success. **Required Skills:** ASIC Engineer , Design Verification Responsibilities: 1. Define and implement IP /SoC verification plans, ... **Summary:** Meta is hiring ASIC Design Verification Engineer ...organization. We are looking for individuals with experience in Design Verification to build IP and System… more
- Meta (Menlo Park, CA)
- …a first-pass silicon success. **Required Skills:** ASIC Engineer , Design Verification Responsibilities: 1. Define and implement block/ IP /System on Chip ... **Summary:** Meta is hiring ASIC Design Verification Engineer ...organization. We are looking for individuals with experience in Design Verification to build IP and System… more
- Meta (Menlo Park, CA)
- …first-pass silicon success. **Required Skills:** ASIC Engineer , Design Verification Responsibilities: 1. Define and implement IP /SoC verification plans, ... **Summary:** Meta is hiring ASIC Design Verification Engineer ...organization. We are looking for individuals with experience in Design Verification to build IP and System… more
- Meta (Sunnyvale, CA)
- …To apply, click "Apply to Job" online on this web page. **Required Skills:** ASIC Engineer , Design Verification Responsibilities: 1. Evaluate, develop and ... and NOC subsystems 15. 4. SystemVerilog/UVM methodology or C/C++ based verification 16. 5. ASIC development cycles 17. 6. IP /sub-system or SoC (System On Chip)… more
- Meta (Sunnyvale, CA)
- …on this web page. **Required Skills:** ASIC Engineer , Design Verification Responsibilities: 1. Define and implement block/ IP /SoC verification plans, ... functional tests based on verification test plan. 3. Drive Design Verification to closure based on defined verification metrics...verification. 8. 2. Track record of 'first-pass success' in ASIC development cycles. 9. 3. Experience in block/ IP… more
- Meta (Austin, TX)
- …as machine learning, video transcoding and network acceleration. **Required Skills:** ASIC Engineer , Design Responsibilities: 1. Architecture exploration ... **Summary:** Meta is hiring ASIC Design Engineers within our Infrastructure...2. Micro-architecture development 3. Soft and hard IP identification, selection and integration. Collaboration with verification and… more
- Meta (Jackson, MS)
- …on this web page. **Required Skills:** ASIC Engineer , Design Verification Responsibilities: 1. Define and implement IP /SoC verification plans, build ... IP /SoC (System On Chip) Verification 10. 4. Debugging design 11. 5. Functional Coverage 12. 6. Automation Scripting...to $287,650/year + bonus + equity + benefits **Industry:** Internet **Equal Opportunity:** Meta is proud to be an… more
- Cisco (San Jose, CA)
- ASIC Design Engineer - Design &...multiple timing modes + Option to also do block level RTL design or block or top-level IP integration + Helping ... systems, leveraging the latest technology. We're seeking a talented ASIC engineer with a proven track record...of what's possible! **Your Impact** You are a diligent Design /SDC Engineer with strong analytical skills and… more
- Amazon (Austin, TX)
- … design quality and making the right trade-offs. Key job responsibilities As an ASIC Design Engineer , you will: * Develop and implement high-performance, ... rapid integration of emergent technologies. We're looking for an ASIC Design Eengineer to help us trail-blaze...innovate, explore new solutions, and contribute to the company's intellectual property through patents About the team… more
- Arrow Electronics (San Jose, CA)
- **Position:** Senior ASIC Design Engineer (eInfochips Inc) **Job Description:** **What candidate will Be Doing:** + Map multi-million gate SoC designs onto ... prototyping methodology. + **Option to engage in block-level RTL design or block or top-level IP integration.**...by a minimum of 10 years of experience in ASIC or a related field, or a Master's Degree… more
- NVIDIA (Austin, TX)
- …can make a lasting impact on the world. Join the NVIDIA System-On-Chip (SOC) group as an ASIC Design Engineer and make a broad impact. You will focus on ... improving methodologies and delivering system-level IP to measure performance across multiple projects. What you'll...system + Run and debug RTL checks to ensure design quality (eg, cross clock domains (CDC), clocks, reset,… more
- Google (Sunnyvale, CA)
- …AI acceleration. In this role, you will design Register-Transfer Level (RTL) Intellectual Property ( IP ) with a focus on chip-to-chip interconnect ... of hardware experiences, delivering unparalleled performance, efficiency, and integration. As a Design Engineer , you will play an important role in designing… more
- Qualcomm (San Diego, CA)
- …applications. QCT mixed-signal design team consists of architects and ASIC designers, protocol experts, signal processing engineers, and algorithm designers ... Design **General Summary:** Job Description QCT mixed-signal IP design team is looking for talented...course selections and/or work experience. + Experience working with ASIC design tools such as Cadence Virtuoso.… more
