- MIT Lincoln Laboratory (Lexington, MA)
- …development, the Laboratory has implemented vertically integrated in-house resources to facilitate design , lithographic mask layout , material growth and ... CurvyCore o Programming in Perl, TCL, or Python o Experience with RF layout design At MIT Lincoln Laboratory, our exceptional career opportunities include… more
- NVIDIA (Santa Clara, CA)
- …human creativity and intelligence. We would love to hear from you! Are you looking for a Mask layout Design Engineer role? We are looking for a Senior ... Mask Layout Design Engineer! Someone...Mask Layout Design Engineer! Someone who is excited... Design . + Deep understanding of analog circuit layout concepts in submicron CMOS technologies. +… more
- NVIDIA (Santa Clara, CA)
- …and intelligence. We would love to hear from you! We are looking for a Senior Mask Layout Design Engineer, someone who is excited to join a growing ... experience. + Minimum of 7+ years industry experience in Mask and Layout Design . +... Design . + Deep understanding of analog circuit layout concepts in submicron CMOS technologies. +… more
- Capgemini (Minneapolis, MN)
- **About the job you're considering** * 10 years of experience in analog/mixed-signal layout design of deep submicron CMOS circuits and at least 3 years of ... * Lead layout team in completing complex layout for analog/mixed-signal circuits in deep submicron CMOS... layout * Utilizing advanced CAD tools and mask design knowledge to deliver correct and… more
- MIT Lincoln Laboratory (Lexington, MA)
- …development, the Laboratory has implemented vertically integrated in-house resources to facilitate design , lithographic mask layout , material growth and ... changes. The engineer will collaborate with others involved in mask layout from basic layout ...o Programming in Perl, TCL, or Python o RF layout design experience o Experience with Cadence… more
- Micron Technology, Inc. (Richardson, TX)
- …of physical verification methodologies, flows, and quality metrics. + 5+ years of experience in CMOS circuit design , layout , and verification. + 5+ years of ... and methodologies for next-generation memory designs. Collaborating closely with design , layout , verification, modeling, and process teams,...+ 1+ years of experience in DFM, tape-out, and Mask generation flows. + 1+ years of experience with… more
- NY CREATES (Albany, NY)
- …our offerings. Job responsibilities include, but are not limited to: + Handling 3rd party design IP. + Design rule checking and waiver reviews. + Collection and ... with other integration team members. + Coordinating with vendors such as the mask house, dicing/packaging, and any outsourced processes + Integration support for the… more
- NVIDIA (Santa Clara, CA)
- …Engineering and 4+ year's experience + A basic understanding of mosfet device behavior, CMOS layout , and VLSI design + Excellent programming skills + ... configure and support foundry PDKs + Maintain the custom design environment used by custom schematic and mask... design environment used by custom schematic and mask designers + Write scripts using perl, python, and… more