• Senior Design For Test

    Microsoft Corporation (Santa Clara, CA)
    …equivalent experience. + 2+ years of industry experience as a Design For Test ( DFT ) engineer . + Hands on experience with Tessent tools for scan and ... team in Santa Clara is looking for a Senior Design For Test Engineer to...Timing constraint development for DFT structures + Design and integrate test structures such as… more
    Microsoft Corporation (07/31/25)
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  • DFT Design Engineer , AWS…

    Amazon (Austin, TX)
    …what is possible today. Key job responsibilities * Develop, implement and verify state-of-the-art Design for Test ( DFT ) architectures * Work with block ... designers to integrate DFT implementations * Work with physical design ...DFT , including ATPG, JTAG, MBIST and trade-offs between test quality and test time - Experience… more
    Amazon (06/25/25)
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  • DFT Engineer (eInfochips)

    Arrow Electronics (Santa Clara, CA)
    …closely with STA, physical design , and power engineers to debug and resolve DFT -related problems. Work in partnership with test engineers to bring up test ... **Position:** DFT Engineer (eInfochips) **Job Description:** **Position:...Years** **What You'll Be Doing:** Develop and implement comprehensive DFT architectures tailored to specific design requirements.… more
    Arrow Electronics (07/29/25)
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  • ASIC Engineer , DFT

    Meta (Sunnyvale, CA)
    …hiring ASIC DFT Engineers within our Infrastructure organization to work on Design for Test ( DFT ) methodologies, implementation, and verification to ... We are looking for individuals with a background in Design for Testability ( DFT ) methodologies and implementation...and IEEE standards (1149, 1500, 1687). **Required Skills:** ASIC Engineer , DFT Responsibilities: 1. Develop and implement… more
    Meta (08/01/25)
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  • DFT Engineer - CPU

    Qualcomm (Santa Clara, CA)
    …chip designers, implementation engineers and test engineers to verify the DFT and DFD ( Design for Debug) architecture, implementation, and test ... create a smarter, connected future for all. As a DFT Engineer you will work with chip...experience using Verilog or VHDL + Experience with ASIC test , DFT , and debug + 2+ years… more
    Qualcomm (07/04/25)
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  • ASIC DFT Engineer I, Annapurna Labs

    Amazon (Austin, TX)
    …Key job responsibilities Key job responsibilities * Develop, implement and verify state-of-the-art Design for Test ( DFT ) architectures * Work with block ... designers to integrate DFT implementations * Work with physical design team to setup and implement DFT insertion flow * Develop high coverage and cost… more
    Amazon (07/02/25)
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  • Sr Principal DFT Application…

    Cadence Design Systems, Inc. (Cary, NC)
    …We are looking for SoC/ASIC Digital Design Engineer with experience in Design for Test ( DFT ). An intimate knowledge and experience in scan chain ... years of professional experience in SoC/ASIC Digital Design with focus on Design for Test ( DFT ) + Should possess intimate knowledge of DFT insertion… more
    Cadence Design Systems, Inc. (06/06/25)
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  • Senior DFT Engineer

    NVIDIA (Santa Clara, CA)
    …in Electrical Engineering or a related field + 5+ years of hands-on experience in Design -For- Test ( DFT ) + Deep knowledge of DFT tools, methodologies, ... today. NVIDIA's DFX team is looking for an exceptional DFT Engineer to help shape the future...future of compute. As stewards of the entire Scan Test Lifecycle, we drive innovation for the most advanced… more
    NVIDIA (06/17/25)
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  • Senior DFT Methodology Engineer

    NVIDIA (Santa Clara, CA)
    …experience) with 5+, MSEE with 3+, or PhD with 2+ years of experience in DFT , system architecture, or RTL design . + Understanding of fundamental DFT ... works on groundbreaking innovations involving crafting creative solutions for cutting edge test techniques, in-system test architecture, as well as verification… more
    NVIDIA (07/01/25)
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  • Senior Principal ASIC DFT Engineer

    Northrop Grumman (Morrisville, NC)
    …history. Northrop Grumman Mission Systems, Digital Technologies Group, is seeking an ASIC DFT Engineer to join our team of highly qualified, diverse individuals ... DoD Secret clearance.** **Roles and Responsibilities:** + Responsible for DFT ( Design for Testabilty) aspects of ASIC...+ Experience in full product life cycle of ASIC Design + Experience with Cadence and/or Mentor test more
    Northrop Grumman (07/08/25)
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  • Senior DFT Engineer

    NVIDIA (Santa Clara, CA)
    …human imagination and intelligence. Make the choice to join us today. Design -for- Test Engineering at NVIDIA works on groundbreaking innovations involving ... crafting creative solutions for DFT architecture, verification and post-silicon validation on some of...work with cross functional teams, implementing state-of-the-art designs in test access mechanisms, IO BIST, memory BIST and scan… more
    NVIDIA (07/22/25)
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  • Lead Software Engineer , DFT /Atpg

    Cadence Design Systems, Inc. (Austin, TX)
    …on the world of technology. Cadence Design Systems is looking for a highly motivated engineer to work with the Modus Test R&D team working on Design For ... Test ( DFT ) and Automatic Test Pattern Generation (ATPG) Software. What You'll Be Doing...modern life depends on. We are a global electronic design automation company, providing software, hardware, and intellectual property… more
    Cadence Design Systems, Inc. (07/18/25)
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  • Director, Engineering DFT /DFM

    Skyworks (Newbury Park, CA)
    …concept and architecture definitions through high-volume production, you will: + Architect and enforce Design For Test ( DFT ) and Design For Manufacturing ... + DFMEA Mindset: "How can this IP fail?" - stress- test design assumptions + Drive block level...Segment: RF Engineer , Electrical Engineering, Front End, Test Engineer , Database, Engineering, Technology Apply now… more
    Skyworks (07/06/25)
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  • Test Design Hardware Developer

    IBM (Austin, TX)
    …you will be a great fit for our team. **Your role and responsibilities** As a Test Design Engineer , you will be responsible for architecting and implementing ... high-performance silicon in innovative ways. We're looking for a DFT Engineer who values teamwork and brings...as DFT Compiler, TetraMax and TestMax for design testability analysis and test point insertion… more
    IBM (07/25/25)
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  • Senior ASIC Design Engineer - DFX

    NVIDIA (Santa Clara, CA)
    We are now looking for a Senior ASIC Design Engineer - DFX! NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 sparked ... debug and issue resolution. + Mentor junior engineers on test design strategies and trade-offs related to...(UVM experience is a plus.) + Deep expertise in DFT design , methodology, and implementation. + Familiarity… more
    NVIDIA (05/22/25)
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  • Product Test Engineer

    Cisco (San Jose, CA)
    …to optimize test efficiency and drive yield improvements. Collaborate with Design , SoC, DFT , Reliability, Quality, Failure Analysis and Manufacturing teams ... Product Test Engineer Apply (https://jobs.cisco.com/jobs/Login?projectId=1444752) + Location:San...design teams in the Central Hardware Group, peer Test and Product Engineers in Silicon Operations, and with… more
    Cisco (07/29/25)
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  • Senior DFx/RTL Engineer

    Cisco (San Jose, CA)
    design cycle. **Key Responsibilities:** + Responsible for implementing the Hardware Design -for- Test ( DFT ) features that support ATE, in-system test ... in San Jose, CA with a primary focus on Design -for- Test . You will work with Front-end RTL...team will participate in the creation of Innovative Hardware DFT & physical design aspects for new… more
    Cisco (07/22/25)
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  • Electrical Test Engineer , Project…

    Amazon (Redmond, WA)
    …or granted asylum. Key job responsibilities We are looking for Electrical Test Engineer (s) capable of operating in a fast-paced, ever-changing, multi-platform ... test , and process development. As an Electrical Test Engineer on our team, you will...concurrently with the design engineers to provide design for testability ( DFT ) feedback throughout the… more
    Amazon (07/22/25)
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  • RF Test Development Engineer

    Celestica (Maple Grove, MN)
    …Maple Grove **General Overview** **Functional Area:** Engineering (ENG) **Career Stream:** Test Engineering Development (TED) **Role:** Staff Engineer (SEN) ... Level:** Level 10 **Direct/Indirect Indicator:** Indirect **Summary** The RF Test Development Engineer designs, develops and implements...develops and implements automatic test equipment and test programs for product testing and design more
    Celestica (06/21/25)
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  • Senior PCBA Manufacturing Test

    Amazon (Redmond, WA)
    …Development team on test coverage, fault isolation capability, PCBA failure trends, and DFT ( Design for Test ) recommendations. * Run small teams to ... world. Key job responsibilities As a Sr. PCBA Manufacturing Test Engineer , you will be responsible for... setup/processes at Contract Manufacturing sites including identification, specification, design and qualification of test fixtures, … more
    Amazon (06/11/25)
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