- NVIDIA (Santa Clara, CA)
- …life's work, to amplify human inventiveness and intelligence. We are now looking for a motivated Senior ASIC Test Timing Engineer to join our dynamic and ... inventiveness and intelligence. What you'll be doing: + Drive timing analysis and closure of Nvidia's GPUs, CPUs, DPUs...DFX, Clocks, and other teams in coming up with timing closure strategy, creating timing constraints, driving… more
- NVIDIA (Santa Clara, CA)
- …design tradeoffs and methodology on next generation CMOS technology. We are looking for a Senior ASIC Timing Engineer to join our dynamic and growing team! ... balance between frequency and power/area/congestions/yield/etc. + Work on all aspects of DFT/ Test timing such as timing constraints, timing analysis, … more
- Northrop Grumman (Morrisville, NC)
- …design, verification, design-for- test and physical design teams to optimize the timing and improve design performance + Develop and validate timing ... Mission Systems, Digital Technologies Group, is seeking a Static Timing Engineer to join our team of highly qualified,...+ Experience in the full product life cycle of ASIC Design + Effective communication and presentation skills and… more
- The Boeing Company (Huntington Beach, CA)
- …opportunity for multiple ** ASIC and/or FPGA Design and Verification Engineers (Lead, Senior or Principal)** to join us as part of our Boeing Electronic Products ... team and third-party IP as needed + Perform static timing analysis, LEC, CDC, linting, and other necessary checks...production designs + Professional experience with hardware-based integration and test of ASIC /FPGA designs + Proven record… more
- RTX Corporation (Cedar Rapids, IA)
- … analysis, linting analysis, LEC, and clock-domain-crossing analysis. + Perform ASIC /FPGA/SoPC verification using inspection, analysis, simulation, and test ... None/Not Required Are you interested in becoming part of a growing Avionics FPGA/ ASIC team? This position is for a highly experienced, highly motivated Electrical or… more
- RTX Corporation (El Segundo, CA)
- …of a rapidly evolving global market. This position is for a motivated Senior Electrical or Computer engineering candidate to be involved in the design, ... Technologies team. **What You Will Do:** + Requirements capture, ASIC / FPGA digital architecture and design using RTL,... / FPGA digital architecture and design using RTL, timing closure, verification, and system integration + Recommend new… more
- RTX Corporation (Cedar Rapids, IA)
- …of a rapidly evolving global market. This position is for a motivated Senior Electrical or Computer engineering candidate to be involved in the design, ... Technologies team. **What You Will Do:** + Requirements capture, ASIC / FPGA digital architecture and design using RTL,... / FPGA digital architecture and design using RTL, timing closure, verification, and system integration + Recommend new… more
- NVIDIA (Santa Clara, CA)
- …design tradeoffs and methodology on next generation CMOS technology. We are looking for a Senior ASIC Synthesis Engineer to join our dynamic and growing team! If ... intelligence. What You'll Be doing: + As a Front-End ASIC Synthesis Engineer, you will own RTL synthesis and...optimization tasks + Collaboration with physical design to address timing , area, congestion tradeoffs + Drive timing … more
- Northrop Grumman (Linthicum Heights, MD)
- …life cycle of ASIC Design + Experience with Cadence and/or Mentor test insertion and ATPG tools + Experience with hierarchical scan testing, IEEE-1500 and/or ... Grumman Mission Systems, Digital Technologies Group, is seeking an ASIC DFT Engineer to join our team of highly...IEEE-1687, test compression, JTAG IEEE-1149.1 and IEEE-1149.6 (AC JTA +… more
- SpaceX (Sunnyvale, CA)
- Sr. SOC/ ASIC Physical Design Engineer (Silicon Engineering) Sunnyvale, CA Apply SpaceX was founded under the belief that a future where humanity is out exploring the ... ultimate goal of enabling human life on Mars. SR. SOC/ ASIC PHYSICAL DESIGN ENGINEER (SILICON ENGINEERING) At SpaceX we're...internet to millions of users worldwide. We design, build, test , and operate all parts of the system -… more
- SpaceX (Irvine, CA)
- …work extended hours and weekends as needed COMPENSATION & BENEFITS: Pay range: ASIC Design Engineer/ Senior : $160,000.00 - $220,000.00/per year Your actual level ... Sr. ASIC Design Engineer (Silicon Engineering) Irvine, CA Apply...internet to millions of users worldwide. We design, build, test , and operate all parts of the system -… more
- SpaceX (Sunnyvale, CA)
- …path delay fault models, while focusing on pattern compression, diagnosis, and hierarchical test flows. + Run and debug non- timing and SDF annotated gate-level ... Sr. SOC/ ASIC DFT Engineer (Silicon Engineering) Sunnyvale, CA Apply...internet to millions of users worldwide. We design, build, test , and operate all parts of the system -… more
- Amazon (Austin, TX)
- …scale and rapid integration of emergent technologies. We're looking for an ASIC Design Eengineer to help us trail-blaze new technologies and architectures, while ... signal routing - As a key member of the ASIC design team, you will implement and deliver high...requirements. - Develop micro-architecture, implement SystemVerilog RTL, and deliver synthesis/ timing clean design with constraints. - Perform lint and… more
- L3Harris (Anaheim, CA)
- …with deep mastery and substantive technical expertise in hardware, RF Electrical, and ASIC design, development, test , and manufacturing as well as advanced ... layout, and timing . . 15+ years of experience in leading senior hardware engineering teams and hands-on detailed RF hardware engineering to successfully complete… more
- Cisco (San Jose, CA)
- …+ DFT CAD development - Test Architecture, Methodology and Infrastructure + Test Static Timing Analysis + Post silicon validation using DFT patterns. **Why ... Senior DFx/RTL Engineer Apply (https://jobs.cisco.com/jobs/Login?projectId=1447271) + Location:San Jose,...be in the Silicon One development organization as an ASIC Implementation Technical Lead in San Jose, CA with… more
- Renesas (Duluth, GA)
- Senior Staff Digital Engineer Job Description + **Education:** Bachelor or Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or a ... device-level or sub-system specifications. + Fluent in Verilog RTL coding and ASIC design methodology + Expertise in digital design implementation, including logical… more
- Google (Fremont, CA)
- Senior Silicon Pre-to-Post Validation Lead, Raxium _corporate_fare_ Google _place_ Fremont, CA, USA **Advanced** Experience owning outcomes and decision making, ... + 15 years of experience in Application-Specific Integrated Circuit/System on Chip ( ASIC /SoC) design, with a focus on both digital logic design and Design… more
- Silvus Technologies (Irvine, CA)
- …processing blocks while working with systems engineers. + RTL coding, simulation, and test bench development. + FPGA synthesis and timing closure. + Hardware ... (MSEE). + Basic MATLAB skill. + Experience with communication systems on FPGA or ASIC designs. **COMPENSATION** _The pay range is NOT a guarantee. It is based on… more
- Northrop Grumman (Annapolis Junction, MD)
- …encouraged, all within a culture of design. We are seeking an exceptional Senior Functional Verification Engineer specializing in ASIC and FPGA technologies. The ... only part of history, they're making history. The Systems Engineering Integration & Test (SEIT) department is seeking a Staff Lead Design Verification Engineer to… more
- L3Harris (Anaheim, CA)
- …providing critical technology advancements in the areas of GPS/Position Navigation and Timing , and Range and Test Solutions. We offer competitive benefits, ... and flow down applicable requirements to other groups (software, ASIC , & test ) so that they can...Ability to provide project management reports as required, support senior level and customer reviews as necessary. . Ability… more