- SpaceX (Sunnyvale, CA)
- Sr . SOC / ASIC Physical Design Engineer (Silicon Engineering) Sunnyvale, CA Apply SpaceX was founded under the belief that a future where humanity is out ... to make this possible, with the ultimate goal of enabling human life on Mars. SR . SOC / ASIC PHYSICAL DESIGN ENGINEER (SILICON ENGINEERING) At SpaceX we're… more
- SpaceX (Bastrop, TX)
- Sr . SOC / ASIC Physical Design Engineer (Silicon Engineering) Bastrop, TX Apply SpaceX was founded under the belief that a future where humanity is out ... to make this possible, with the ultimate goal of enabling human life on Mars. SR . SOC / ASIC PHYSICAL DESIGN ENGINEER (SILICON ENGINEERING) At SpaceX we're… more
- SpaceX (Irvine, CA)
- Sr . ASIC Design Engineer (Silicon Engineering) Irvine,... clean design + Participate in all phases of ASIC and/or FPGA design flow (eg synthesis, timing ... the ultimate goal of enabling human life on Mars. SR . ASIC DESIGN ENGINEER (SILICON ENGINEERING) At...problems including clock domain crossings and power optimization + ASIC / SoC system integration experience + Experience with… more
- Amazon (Austin, TX)
- …scale and rapid integration of emergent technologies. We're looking for an ASIC Design Eengineer to help us trail-blaze new technologies and architectures, while ... job responsibilities - integrate multiple subsystems into top level SOC , ensure correct clock/reset/functional/DFT signal routing - As a...signal routing - As a key member of the ASIC design team, you will implement and deliver high… more
- NVIDIA (Santa Clara, CA)
- …plans for NVIDIA's next generation of high-performance IPs for CPU, GPU and SOC designs. + Owning static timing analysis and convergence of high-performance ... experience or MS (or equivalent experience) with 3+ years' experience in ASIC Design and Timing + Hands-on experience in STA tools, ECO implementation, and … more
- NVIDIA (Santa Clara, CA)
- We are now looking for a Senior ASIC Design Engineer to join our System ASIC team! NVIDIA has continuously reinvented itself over two decades. Our invention ... to design and implement the world's leading GPU and SoC 's. With the System- ASIC team, you will...be responsible for the RTL design, logic synthesis, and timing analysis of several modules. + Integrate modules into… more
- NVIDIA (Santa Clara, CA)
- NVIDIA is looking for a Senior Reset and Boot ASIC Engineer to join our System ASIC team! NVIDIA has continuously reinvented itself over two decades. Our ... to design and implement the world's leading GPU and SoC 's. With the System- ASIC team, you will...be responsible for the RTL design, logic synthesis, and timing analysis of several modules. + Integrate modules into… more
- Amazon (Portland, OR)
- …Edge that is powering the latest generation of Echo devices is looking for a Senior SoC Design-STA Engineer to continue to innovate on behalf of our customers. ... STA, Crosstalk Delay and Crosstalk Noise analysis for digital ASIC /SoCs. * Full chip timing constraints development,...(AOCV, POCV Based STA, IR Drop aware STA) into SoC timing signoff flow. * Work for… more
- NVIDIA (Santa Clara, CA)
- We are now looking for a Senior ASIC Floorplan Design Engineer! NVIDIA is seeking a talented ASIC Floorplan Engineer to design and implement the world's ... leading SoC 's and GPU's. This position offers you a unique...timing and routing congestion issues with physical and ASIC design teams by influencing early design and physical… more
- Amazon (Sunnyvale, CA)
- …Edge that is powering the latest generation of Echo devices is looking for a Sr . Physical Design Engineer to continue to innovate on behalf of our customers. We are ... bus / pin planning, place and route, power/clock distribution, congestion analysis, timing closure, IR drop analysis, physical verification, ECO and sign-off. - Work… more
- NVIDIA (WA)
- We are now looking for a Senior ASIC Design Engineer. NVIDIA is seeking ASIC Design Engineers to implement the world's leading SoC 's and GPU's. This ... Craft micro-architecture, implement in RTL, and deliver a fully verified, synthesis/ timing clean design. + Collaborate and coordinate with architects, other… more
- NVIDIA (Santa Clara, CA)
- NVIDIA is seeking an outstanding Senior ASIC Design Engineer to design and implement the world's leading SoC 's and GPU's. This position offers the ... fully verified design by working closely with verification engineers. + Deliver a synthesis/ timing clean design while working with the physical design team to ensure… more
- NVIDIA (Santa Clara, CA)
- NVIDIA Networking Clock design team is looking for experienced top notch ASIC design engineer to work on next generation of NVIDIA Networking chips. We're looking ... working with multiple teams as Architecture, IP, Physical design, Timing and Post-Si teams. Complexity of clocking scheme has...Working on next generation of Networking Switch, NIC and SoC products. + Micro architect and design next generation… more
- Amazon (Austin, TX)
- …Develop and maintain comprehensive gate-level simulation test plans for verifying ASIC functionality and timing . Analyze simulation results, identify and ... Work closely with the system architects to develop world-class SOC and IP blocks, which meet power, area and...DFT on the blocks . Perform initial synthesis & timing analysis . Assist verification team in unit verification… more
- NVIDIA (Santa Clara, CA)
- We are now looking for a Senior ASIC Design Engineer - DFX! NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 sparked ... design, implementation, and verification of DFT IPs for our next-generation SoC products. You'll help drive innovation across the full silicon lifecycle-from… more
- NVIDIA (Santa Clara, CA)
- …Together with other team members, we deliver clock RTL information to GPU, CPU and SOC verification team, timing and DFT teams. + Get involved in end-to-end ... today. The clocks group is looking for a top-notch ASIC engineer to join the team. The Team is...across DFx, Physical Implementation, Power Optimization and Ease of timing closure to innovate and implement new Clocking topologies… more
- Amazon (Cupertino, CA)
- …validation of AWS next generation ML Chips, Cards and server integration. As a senior member of our platform development team, you will have the outstanding and ... data in the fleet. Key job responsibilities As a senior member of the team, you will join a...the life A day in the life of an ASIC Engineer on the AWS Organization team focuses on… more
- Cadence Design Systems, Inc. (Cary, NC)
- …who want to make an impact on the world of technology. We are looking for SoC / ASIC Digital Design Engineer with experience in Design for Test (DFT). An intimate ... testbenches. + Prior 5-15 years of professional experience in SoC / ASIC Digital Design with focus on Design...of JTAG 1149.1/6, IEEE1500 and IEEE1687 + Knowledge of timing analysis and equivalency checks would be added bonus… more
- L3Harris (Camden, NJ)
- …land, sea and cyber domains in the interest of national security. Job Title: Sr ASIC /FPGA VHDL Design Engineer Job Code: 24260 Job Location: Camden, ... of $15,000 Job Description: Reporting to the Manager, Engineering ( ASIC /FPGA), the Senior Member of Engineering Staff...+ Perform Synthesis, Place and Route (PAR) and Static Timing Analysis (STA) + Perform RTL quality using: Lint,… more
- NVIDIA (Santa Clara, CA)
- …GPUs and SOCs on standard FPGA prototyping platforms. We are now looking for a Senior FPGA Prototyping Engineer to join our Emulation team onsite in Santa Clara, CA. ... and route. + Improve performance of the prototype, analyze timing and generate bit streams. + Bring up the...or Synplify Premier and Xilinx Vivado + Exposure to ASIC design and verification tools (VCS or equivalent, Verdi,… more