- NVIDIA (Santa Clara, CA)
- …build and verification of architectural, rtl, and gate level designs. Our tools enable our chip design teams to work on state-of-art design technologies such ... will craft highly efficient software to automate and facilitate chip design and verification engineering workflows and...analysis + Strong expertise in modern C++, compiler, build systems , and database. + Experienced with static and dynamic… more
- NVIDIA (Santa Clara, CA)
- … engineer , you will craft highly efficient software to automate and facilitate chip design and verification processes. What You'll be Doing: + Work as ... team is responsible for development and support of infrastructure tools used by design engineers for build and verification of architectural, rtl, and gate level… more
- Skyworks (San Jose, CA)
- …front-end modules for the fast-paced and highly competitive cellular handset market. As a Multi- Chip Module Design Engineer , you will be responsible for ... Nearest Major Market:San JoseNearest Secondary Market:Palo Alto Job Segment: Front End, Design Engineer , Telecom, Telecommunications, Systems Engineer ,… more
- Google (Sunnyvale, CA)
- …+ Experience in cross-functional collaboration with chip top design , physical design , STA, package, system design , and validation teams. + Experience ... Engineer you will be responsible for the chip package design with signal/power integrity simulation...Engineers. You will work with various cross-functional teams, including Chip Design , System Design… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …and innovators who want to make an impact on the world of technology. Senior Principal Design Engineer - Systems and Interfaces San Jose Job Description: The ... CSG Central Applications Engineering team seeks an experienced SoC design engineer to integrate and support Cadence...designs. This Systems CAE will use advanced system design tools to integrate and validate… more
- NVIDIA (Santa Clara, CA)
- …and problem-solving skills. + Experience in RTL design (Verilog), verification (UVM, System Verilog), System -On- Chip design /integration flow, and ... footprint that is responsible to our environment. The NVIDIA System -On- Chip (SOC) group is looking for a...ASIC Engineer with a curiosity about SOC design automation, RTL integration, chip build and… more
- NVIDIA (Santa Clara, CA)
- We are looking for SOC Design Engineer ! The complexity of the chip has greatly increased over the years. We are now packing tens of billions of transistors ... ASIC Engineer with a curiosity about SOC design automation, RTL integration, chip build and...Experience in RTL design (Verilog), verification (UVM, System Verilog), System -On- Chip design… more
- NVIDIA (Santa Clara, CA)
- …SOC Design (SOCD) team is looking for a highly motivated and creative design automation engineer . As someone who is passionate about design automation, ... engineers to improve efficiency and productivity in our front-end chip development process through innovative design automation... automation solutions and practices + Define and develop system -level methodologies and tools to build SOCs in an… more
- Skyworks (San Jose, CA)
- …and RF/wireless communication systems * Experience with RF power amplifier, multi- chip module/high-speed PCB, RF front-end design , and product development * ... RF Module Design Engineer Apply now " Date:Sep...with effective communication skills. Experience with RF power amplifier, multi- chip module/high-speed PCB, RF front-end design , and… more
- Meta (Sunnyvale, CA)
- …Silicon Packaging Design Engineer Responsibilities: 1. Perform package design for advanced custom silicon comprising single- chip /multi- chip and 3D ... **Summary:** Meta is looking for an experienced Silicon Packaging design Engineer for its Ecosystem and Technical...and analyses, package design /layouts based on silicon chip IO, electrical performance and system ID/form… more
- Microsoft Corporation (Mountain View, CA)
- …working on Intellectual Property (IP) microarchitecture specification, Register Transfer Level (RTL) design , synthesis, and System on Chip (SOC) integration ... and augmented reality. We are looking for a **Senior Design Engineer ** to work in the dynamic...** to work in the dynamic Microsoft Artificial Intelligence System on Chip (AISoC) Silicon team. The… more
- BAE Systems (San Jose, CA)
- …on position level and/or job specifics. **Senior Principal Front End ASIC Design Engineer (Hybrid)** **105684BR** EEO Career Site Equal Opportunity Employer. ... you can apply your expertise in Front End Digital design for ASICs driving our latest sensors highlighted by...sensors and validating the products through programming the bring-up systems to achieve world class performance. Your work will… more
- NVIDIA (Santa Clara, CA)
- …and problem-solving skills + Experience in RTL design (Verilog), verification (UVM, System Verilog), System -On- Chip design /integration flow, and ... NVIDIA is hiring a SOC/IP Methodology Engineer to help design and architect...Electrical Engineering or equivalent experience + Proven ability in chip design , with 5+ years of specializing… more
- Meta (Sunnyvale, CA)
- …mixed signal ICs to drive our industry leading virtual and augmented reality systems . **Required Skills:** Digital Design Engineer Responsibilities: 1. ... **Summary:** As a Digital Design Engineer at Meta Reality Labs,... of Computer Vision/Image Sensing IP. 2. Contribute to chip -level integration, verification plan development and verification. 3. Define… more
- Skyworks (San Jose, CA)
- …including product definition, architecture, system budget, transistor-level circuit design , Multi Chip Module design , layout/layout supervision, ... Staff RF SiP Module Design Engineer Apply now " Date:Sep...& RF semiconductors, Acoustic Filters and integrating ultra dense System -In-Package solutions that will be powering the next wireless… more
- Amazon (Sunnyvale, CA)
- …that is powering the latest generation of Echo devices is looking for a Sr. SOC Design Engineer -STA to continue to innovate on behalf of our customers. We are a ... - Full chip timing constraints development, full chip / Sub- System STA and Signoff for...STA) into SoC timing signoff flow. - Work for Systems and Architecture, SoC Integration, Verification, DFT, Mixed Signal,… more
- SpaceX (Sunnyvale, CA)
- … engineer who will work alongside world-class cross-disciplinary teams ( systems , firmware, architecture, design , validation, product engineering, ASIC ... Sr. Design Verification Engineer (Silicon Engineering) at...with scripting languages, eg Python for automation + RTL design , chip bring-up, and post-silicon validation experience… more
- NVIDIA (Santa Clara, CA)
- …the choice to join us today. The Clocks group is looking for a top-notch ASIC engineer to join the team. The Team is responsible for crafting all aspects of SOC ... clocking. The team collaborates with the front end design team to understand the clocking requirements for the... team to understand the clocking requirements for the chip , interacts with the floor-planning and back end teams… more
- NVIDIA (Santa Clara, CA)
- We are now looking for a Senior Logic Design Engineer ! Asa member of our CPU Logic Design Team, you will be responsible for the design of CPU on- chip ... and off- chip interconnect network, MP coherency and last-level and system caches, focusing on such tasks as micro-architectural definition, RTL coding, logic… more
- NVIDIA (Santa Clara, CA)
- NVIDIA is hiring a Senior Design Engineer to design , analyze, and evolve next generation SoC solutions. We are looking for special individuals with passion ... you are a motivated individual that understands how SoC systems are architected and built, has intimate knowledge of...innovative microarchitectural structures and subsystems. Join the future of chip design , you will work on groundbreaking… more