We interpreted Mountain View, CA as Mountain View, CA. Other options include: Mountain View (Contra Costa County), CA

  • Sr. SOC / ASIC Physical

    SpaceX (Sunnyvale, CA)
    Sr. SOC / ASIC Physical Design Engineer (Silicon Engineering) at SpaceX Sunnyvale, CA SpaceX was founded under the belief that a future where humanity is out ... this possible, with the ultimate goal of enabling human life on Mars. SR. SOC / ASIC PHYSICAL DESIGN ENGINEER (SILICON ENGINEERING) At SpaceX we're leveraging… more
    SpaceX (08/16/24)
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  • ASIC Architect-TPG

    Micron Technology, Inc. (San Jose, CA)
    …by the controller and each of its component IPs. + Defining requirements for ASIC design, verification , and physical implementation teams + Evaluating area, ... while rapidly growing your abilities. We are seeking an ** ASIC Architect** for Micron's ASIC architecture team....Verilog/SystemVerilog + Knowledge and experience in various aspects of SOC design, verification , and implementation flows +… more
    Micron Technology, Inc. (08/16/24)
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  • Senior ASIC Design Engineer

    NVIDIA (Santa Clara, CA)
    …the clocks design. + Together with other team members, we deliver clock information to SOC verification team, timing and DFT teams. You will use Perl to improve ... The Team is responsible for crafting all aspects of SOC clocking. The team collaborates with the front end...team member, you will be collaborating with other architects, ASIC designers and verification engineers to design… more
    NVIDIA (08/09/24)
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  • ASIC Engineer, Implementation

    Meta (Sunnyvale, CA)
    …( SoC ) and IP for data center applications. **Required Skills:** ASIC Engineer, Implementation Responsibilities: 1. Run Logic/ Physical Synthesis using ... **Summary:** Meta is hiring ASIC Frontend Implementation Engineers within our Infrastructure organization....Debug the timing/area/congestion issues and work with RTL & Physical designers to resolve them. 2. Perform Power Estimation… more
    Meta (07/19/24)
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  • Senior ASIC Design Engineer

    NVIDIA (Santa Clara, CA)
    …a routable and physically implementable design. + Collaborate with architects, verification engineers, software engineers, and physical design engineers to ... Design Engineer to design and implement the world's leading SoC 's and GPU's. This position offers the opportunity to...and Digital Systems design. + A deep understanding of ASIC design flow including RTL design, verification ,… more
    NVIDIA (08/07/24)
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  • Senior ASIC Design Engineer - Hardware

    NVIDIA (Santa Clara, CA)
    …+ Together with other team members, we deliver clock information to GPU, CPU and SOC verification team, timing and DFT teams. You will use Perl to improve ... floor-planning and back end team to help craft the physical floorplan of the chip. The team explains the...team member, you will be collaborating with other architects, ASIC designers and verification engineers to design… more
    NVIDIA (09/04/24)
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  • Senior SoC Technical Program Manager,…

    Amazon (Sunnyvale, CA)
    …you will interface with cross-functional engineering and program/product management teams to develop ASIC / SOC solutions that will go into Amazon Devices. In this ... role you will: - Collaborate with engineering leaders ( SOC / ASIC leads) to create project...of Silicon development which are architecture definition, RTL design, Verification , IP design, Physical design, post silicon… more
    Amazon (09/17/24)
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  • Senior Hardware SoC Architect, Architecture…

    NVIDIA (Santa Clara, CA)
    …will be cross-disciplinary, working with software, ASIC design, verification , physical design, VLSI and platform teams. Our SoC architects excel at ... We are now looking for a Senior Hardware SoC Architect for our Tegra team! Do you...validation plan and execution. + Review downstream specifications and verification plans in ASIC , software and/or platform… more
    NVIDIA (09/12/24)
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  • SOC Design Engineer - New College Grad

    NVIDIA (Santa Clara, CA)
    …computing demand in a footprint that is responsible to our environment. The NVIDIA System-On-Chip ( SOC ) group is looking for a top ASIC Engineer with a curiosity ... GPU and Tegra chips and interface, directly with unit-level ASIC , Physical Design, CAD, Package Design, Software,...Ways to stand out from the crowd: + Prior SOC Design or Physical Design internships or… more
    NVIDIA (09/19/24)
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  • Senior SOC Design Engineer

    NVIDIA (Santa Clara, CA)
    …computing demand in a footprint that is responsible to our environment. The NVIDIA System-On-Chip ( SOC ) group is looking for a top ASIC Engineer with a curiosity ... Are you looking for a SOC Design Engineer opportunity? If yes, come and...GPU and Tegra chips and interact directly with unit-level ASIC , Physical Design, CAD, Package Design, Software,… more
    NVIDIA (08/09/24)
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  • Hardware (CPU, GPU, SoC , Digital Design,…

    Qualcomm (Santa Clara, CA)
    …for modem physical and MAC layer processing + Development of verification components using System Verilog and UVM + Participating in model cellular modem ... modeling, RTL), Implementation (synthesis & timing constraints), Design-for-Test (DFT), Physical Design (Place & route, CTS, timing closure), Pre-silicon … more
    Qualcomm (08/20/24)
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  • Sr. SOC Design Engineer - STA, Hardware…

    Amazon (Sunnyvale, CA)
    …STA) into SoC timing signoff flow. - Work for Systems and Architecture, SoC Integration, Verification , DFT, Mixed Signal, IP owners, Synthesis, Place & Route ... generation of Echo devices is looking for a Sr. SOC Design Engineer-STA to continue to innovate on behalf...STA, Crosstalk Delay and Crosstalk Noise analysis for digital ASIC /SoCs. - Full chip timing constraints development, full chip… more
    Amazon (09/17/24)
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  • Functional Verification Applications…

    Siemens Digital Industries Software (Fremont, CA)
    …triage and debugging skills + Deep knowledge of semiconductor IC industry - ASIC , SoC , Memory, Interconnect, CPU architectures, embedded systems + Ability to ... This Applications Engineer (AE) position delivers technical expertise for Functional Verification of digital, mixed-signal, and analog IC chip designs based on… more
    Siemens Digital Industries Software (09/07/24)
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  • Physical Design Engineer

    Cisco (San Jose, CA)
    …Engineering or Computer Science, with 7+ year minimum of hands-on experience in ASIC implementation and Physical verification * Prior experience in ... activities. What You'll Do You will be part of ASIC physical design Team which is responsible... physical implementation from RTL to GDSII. As Physical Verification Engineer your main responsibilities will… more
    Cisco (09/14/24)
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  • Design Engineer

    Cadence Design Systems, Inc. (San Jose, CA)
    …such high power devices into complex scalable enterprise grade hardware. The design / verification / physical design of these ASICs pushes various tools to their ... of related experience; or Master's + Experience in RTL development of complex ASIC / SoC . + Comfortable in Verilog and SystemVerilog for the development of complex… more
    Cadence Design Systems, Inc. (09/19/24)
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  • AE Senior Manager - Serdes Applications

    Cadence Design Systems, Inc. (San Jose, CA)
    …team of skilled engineers and working with customers to develop solutions for their System/ ASIC / SoC designs using the Cadence Serdes IP portfolio. This is a ... pre-sales role. It is perfect for someone who has System/ ASIC / SoC design experience and great interpersonal and communication skills and is committed to the… more
    Cadence Design Systems, Inc. (09/19/24)
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  • Principal Design Engineer

    Cadence Design Systems, Inc. (San Jose, CA)
    …Prior experience of collaborating with Physical Design teams in multiple successful ASIC /IP tapeouts. Knowledge of the IP/ SoC level timing closure flow and ... your responsibilities will span across various aspects for the ASIC frontend flow, which includes RTL integration, maintain the...Static timing analysis (STA), timing closure, power optimization, and physical verification for both of block and… more
    Cadence Design Systems, Inc. (08/01/24)
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  • Senior Design Engineer

    Microsoft Corporation (Mountain View, CA)
    …the program you will be interacting with various teams, including architecture, verification , and physical design, ensuring that the design is implemented ... delivering successful Intellectual Property (IP) or Application Specific Integrated Circuits ( ASIC )/System on Chip( SOC ) designs. + 4+ years expertise in… more
    Microsoft Corporation (09/18/24)
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  • Senior Silicon Engineering

    Microsoft Corporation (Santa Clara, CA)
    …of complex Application-Specific Integrated Circuit ( ASIC ) System on Chip ( SOC ) using Universal Verification Methodology (UVM)/C test bench + Perform ... Pre-Silicon SoC verification , Post-Silicon/ Field-Programmable Gate Array (FPGA) validation by defining testing strategies + Work with Cross-functional teams,… more
    Microsoft Corporation (09/18/24)
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  • Sr. DDR IP Design Engineer (Silicon Engineering)

    SpaceX (Sunnyvale, CA)
    …cross-disciplinary teams (systems, firmware, architecture, design, validation, product engineering, ASIC implementation). In this role, you will be developing ... Own the high quality release of the Memory Controller IP for SpaceX SoC designs, including triaging release/integration issues into IP defects and addressing issues… more
    SpaceX (07/22/24)
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