- SpaceX (Sunnyvale, CA)
- Sr . Synthesis & Front-End STA Engineer (Silicon Engineering) at SpaceX Sunnyvale, CA SpaceX was founded under the belief that a future where humanity is out ... enabling human life on Mars. SR . SOC/ASIC SYNTHESIS & FRONT-END STA ENGINEER (SILICON ENGINEERING)...critical deadlines, as needed COMPENSATION & BENEFITS: Pay range: Synthesis and Front-End STA Engineer / Senior :… more
- SpaceX (Sunnyvale, CA)
- Sr . FPGA/ASIC Design Engineer (Silicon Engineering) at SpaceX Sunnyvale, CA SpaceX was founded under the belief that a future where humanity is out exploring the ... the ultimate goal of enabling human life on Mars. SR . FPGA/ASIC DESIGN ENGINEER (SILICON ENGINEERING) At...new skills COMPENSATION & BENEFITS: Pay range: ASIC/FPGA Design Engineer / Senior : $170,000.00 - $230,000.00/per year Your actual… more
- SpaceX (Sunnyvale, CA)
- Sr . SOC/ASIC Physical Design Engineer (Silicon Engineering) at SpaceX Sunnyvale, CA SpaceX was founded under the belief that a future where humanity is out ... the ultimate goal of enabling human life on Mars. SR . SOC/ASIC PHYSICAL DESIGN ENGINEER (SILICON ENGINEERING)...as needed COMPENSATION AND BENEFITS: Pay range: Physical Design Engineer / Senior : $170,000.00 - $230,000.00/per year Your actual… more
- SpaceX (Sunnyvale, CA)
- Sr . ASIC Design Engineer , DDR IP (Silicon Engineering) at SpaceX Sunnyvale, CA SpaceX was founded under the belief that a future where humanity is out exploring ... the ultimate goal of enabling human life on Mars. SR . ASIC DESIGN ENGINEER , DDR IP (SILICON...critical milestones COMPENSATION & BENEFITS: Pay range: ASIC/FPGA Design Engineer / Senior : $170,000.00 - $230,000.00/per year Your actual… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …world of technology. What you will do - + You'll be joining our Application Engineering Team, which is responsible for acheiving best in class Power Peformance Area ... to see - + You are a Physical Design Engineer with 7+ years of experience. + Have a...Experience running P&R tools like Innovus/ICC2 + Experience running synthesis tools like Genus/DC + Experience in Block-level and… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …compute engines enable applications such as Machine Learning, Edge AI, Radar, Audio, Speech , and Vision. Our IP designs are used by leading semiconductor developers ... The CSG Central Applications Engineering team seeks an experienced SoC design engineer to integrate and support Cadence IP products in system reference designs.… more
- Qualcomm (Santa Clara, CA)
- …envelope on performance, energy efficiency and scalability. As CPU Physical Design CAD engineer , you will build and support the world's best implementation tools and ... of clock mesh structures, clock H-tree/spine structures and multi-source clock tree synthesis + Develop custom in-house tools and/or script-ware to enhance or exceed… more
- Qualcomm (Santa Clara, CA)
- …through the full ASIC development process from specification, RTL implementation, verification, synthesis , timing closure, emulation and post silicon bring up. + The ... a moderate amount of influence over key organizational decisions (eg, is consulted by senior leadership to make key decisions). * Tasks do not have defined steps;… more
- NVIDIA (Santa Clara, CA)
- We are looking for a Senior CPU Implementation Methodology Engineer to join our VLSI team! If you are looking for a challenging and exciting role and you are a ... responsible for all aspects of front-end design implementation methodologies ( synthesis , formal-equivalence-checking), flow automation and application support of… more
- Microsoft Corporation (Mountain View, CA)
- …Azure cloud servers, clients, and augmented reality. We are looking for a ** Senior Physical Design Engineer ** to work on leading edge Intellectual Property ... of experience in hardware design. + 4+ years of experience in synthesis , timing constraints and timing closure, front-end design checks, place-and-route and PPA… more
- Microsoft Corporation (Mountain View, CA)
- …where everyone can thrive at work and beyond. We are looking for a ** Senior Design Engineer ** to work in the dynamic Microsoft Artificial Intelligence System ... Property (IP) microarchitecture specification, Register Transfer Level (RTL) design, synthesis , and System on Chip (SOC) integration on different subsystems.… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …technology. We are excited to welcome highly talented hardware designers and application engineers to join our Cadence North America Field Applications Team. Working ... with IC digital implementation flows and font-end EDA tools including Synthesis , DFT, and Logical Equivalence CheckingPrior experience with Cadence tools such… more
- Micron Technology, Inc. (San Jose, CA)
- …inspiring the world to learn, communicate and advance faster than ever. As a Senior Design Engineer at Micron Technology, Inc., you will be responsible for ... plan and execution. Ensure RTL design and implementation of the controller hardware, synthesis , APR and full timing closure as well as development of firmware code… more
- Microsoft Corporation (Santa Clara, CA)
- …(DPU) team within the Azure Hardware Systems & Infrastructure group is seeking a Senior Silicon Silicon Engineer . You will join our front-end silicon team and ... high performance, low power, scalable and programmable DPU silicon. **Responsibilities** + As a Senior Silicon Engineer in the Data Processing Unit team you will… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …who want to make an impact on the world of technology. Principal Application Engineer responsible for providing pre-sales and post-sales technical support for ... 3DIC. + Working with customers in one or more of the following areas: Synthesis , Place and Route, timing and power signoff. + Understanding and proliferating Cadence… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …and will be able to collaborate successfully as needed with the digital, analog and application teams. Candidate should be willing to work full time in the San Jose ... of Lint checks and proper resolution of errors + Understanding synthesis timing constraints, static timing analysis and constraint development + Understanding… more
- Siemens Digital Industries Software (Fremont, CA)
- …& Development **Req ID:** 396866 Company: Siemens EDA Job Title: OPC Product Engineer Job Reference #: 396866 Job Location: Wilsonville, OR, Fremont, CA Siemens EDA ... team with a primary focus on development of mask synthesis flows and solutions for patterning processes. The Product... flows and solutions for patterning processes. The Product Engineer role provides an extraordinary opportunity to help define… more
- Qualcomm (Santa Clara, CA)
- …help create a smarter, connected future for all. As a Qualcomm ASIC Engineer , you will define, model, design (digital and/or analog), optimize, verify, validate, ... of work experience in a role requiring interaction with senior leadership (eg, Director level and above). **Principal Duties...of highly complex process flow from high-level design to synthesis , place and route, timing and power use, and… more
- Siemens Digital Industries Software (Fremont, CA)
- …chip, board and system design. **Job Overview** Siemens EDA is seeking a senior level, self-starting, motivated, and high performing individual for an opportunity to ... EDA tools and design methods including: o ASIC design methodology from RTL Synthesis to Physical Implementation phases o RTL Design/Verification, LEC, STA analysis o… more
- Siemens Digital Industries Software (Fremont, CA)
- …chip, board and system design. **Job Overview** Siemens EDA is seeking a senior level, self-starting, motivated, and high performing individual for an opportunity to ... EDA tools and design methods including: o ASIC design methodology from RTL Synthesis to Physical Implementation phases o RTL Design/Verification, LEC, STA analysis o… more