- Qualcomm (Santa Clara, CA)
- …Area:** Engineering Group, Engineering Group > CPU Engineering **General Summary:** As a CAD Engineer focusing on the DV & Emulation methodology and support, you ... will work with RTL, architecture, design, DV , software and silicon verification users. Interfaces with various cross functional teams and external vendors to define,… more
- Qualcomm (Santa Clara, CA)
- …in as a Multimedia Design Verification in Camera/Imaging team. A successful DV candidate will work on developing verification infrastructure for Camera IP delivered ... of Verification plans in collaboration with IP Verification, Design and System leads. **Minimum Qualifications** + Bachelor's degree in Engineering, Science, or… more
- Micron Technology, Inc. (San Jose, CA)
- …to create a test environment with an innovative flow to boost System Design Verification efficiency and quality. Demonstrate value proposition to left-shift ... system level integration among hardware, firmware, and ...coverage closure + Clear mindset on how to achieve DV quality signoff + Good communication skills to work… more
- Qualcomm (Santa Clara, CA)
- …Engineering Group, Engineering Group > CPU Engineering **General Summary:** As a CAD Engineer focusing on the methodology and support of RTL design verification, you ... and 6+ years of Hardware Engineering, Software Engineering, Electrical Engineering, Systems Engineering, or related work experience. OR Master's degree in Electrical… more
- Capgemini (Santa Clara, CA)
- **Job Title: Senior DV Engineer ** **Job Location: Santa Clara CA** **Job description:** We are looking for Senior Design Verification Engineer **Key ... their journey towards Intelligent Industry. Capgemini Engineering has more than 55,000 engineer and scientist team members in over 30 countries across sectors… more
- Meta (Sunnyvale, CA)
- …AR/VR silicon solutions in support of our industry leading virtual and augmented reality systems .As a Design Verification Engineer (DVEs), you will be a key ... planning, reviewing and executing our front-end verification efforts at the IP and sub- system levels. You will collaborate in improving DV methodologies and… more
- Cisco (San Jose, CA)
- …in the Silicon One development organization as an ASIC design verification engineer in San Jose, CA. You collaborate closely with verification engineers, designers, ... ASIC bring up. What You'll Do * Maintaining existing DV environments and enhancing them * Construct testbench including...You Are * You are an ASIC Design Verification Engineer with 5+ years of related work experience with… more
- Microsoft Corporation (Mountain View, CA)
- …an extremely efficient manner. We are looking for a **Principal Design Verification Engineer ** to work in the dynamic Microsoft Artificial Intelligence System on ... on design verification of complex Intellectual Property (IP) or Subsystem or System on Chips(SoC) level features. + Collaborate with the architecture and design… more
- Qualcomm (Santa Clara, CA)
- …Group, Engineering Group > CPU Engineering **General Summary:** As a Design Verification Engineer , you will work with Chip Architects to validate the concepts of CPU ... Work with CPU and SOC Architects to understand the concepts and high-level system requirements. + Develop detailed Test and Coverage plans based on the Architecture… more
- Novo Nordisk (Fremont, CA)
- …heart failure. Are you ready to make a difference? The Position The Engineer - Facilities will be responsible for driving maintenance and calibration activities for ... and assist in coordination with manufacturing and support teams. Relationships The Engineer - Facilities will work at the CMC Stem Cell Manufacture facility… more
- Meta (Sunnyvale, CA)
- …Post-Silicon teams towards creating a first-pass silicon success. **Required Skills:** ASIC Engineer , Design Verification Responsibilities: 1. Lead the DV effort ... **Summary:** Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. We are looking...with experience in Design Verification to build IP and System On Chip (SoC) for data center applications.As a… more
- Meta (Sunnyvale, CA)
- **Summary:** Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in Design ... Verification to build IP and System On Chip (SoC) for data center applications.As a Design Verification Engineer , you will be part of a dynamic team working with… more
- Google (Sunnyvale, CA)
- …software and networking technologies that power all of Google's services. As a Hardware Engineer , you design and build the systems that are the heart of ... from the lowest levels of circuit design to large system design and see those systems all...directly with other team members as well as designers, DV Engineers, Validation Engineers, and software teams to deliver… more
- Qualcomm (Santa Clara, CA)
- …Engineering Group > CPU Engineering **General Summary:** As a CPU Virtual Platforms Engineer , you will be part of CPU verification team to deliver complex ... and 6+ years of Hardware Engineering, Software Engineering, Electrical Engineering, Systems Engineering, or related work experience. OR Master's degree in Electrical… more
- Meta (Sunnyvale, CA)
- …silicon), developing flows around EDA tools, and low-power design to build efficient System on Chip (SoC) and IP for data center applications. **Required Skills:** ... ASIC Engineer , Power Responsibilities: 1. Define the power specification at system and module level for Idle, TDP, Typical use cases. 2. Develop power modeling… more
- Qualcomm (Santa Clara, CA)
- …Group, Engineering Group > CPU Engineering **General Summary:** As a CPU Emulation Engineer , you will work as part of CPU verification team to deliver ... on emulation models. + Execute verification plans, including design bring-up, DV environment bring-up, regression enabling for all features under your care,… more
- Qualcomm (Santa Clara, CA)
- …ASICS Engineering **General Summary:** We are looking for an ASIC Design Verification Engineer with strong CPU, ASIC design and verification fundamentals to work in ... and formal verification techniques. Verify wide range of complex system low power and complete end to end low...plans, coverage closure and post-silicon bring-up + Manage small DV team. **Minimum Qualifications:** * Bachelor's degree in Science,… more
- Qualcomm (Santa Clara, CA)
- …Age - and this is where you come in as an ASIC Design Verification Engineer The team is responsible for the complete verification lifecycle, from system -level ... to improve verification efficiency. **Qualifications:** + Minimum 3 years of DV experience using uvm/assertion based verification technologies + Experience in… more
- Meta (Sunnyvale, CA)
- …including RTL Lint, CDC analysis, timing constraints, synthesis to build efficient System on Chip (SoC) and IP for data center applications. **Required Skills:** ... ASIC Engineer , Implementation Responsibilities: 1. Run Logic/Physical Synthesis using advanced...STA, Power). 11. Work closely with the Design Engineers, DV Engineers, Emulation Engineers in supporting them with the… more
- NVIDIA (Santa Clara, CA)
- NVIDIA is looking for a Verification Engineer to join our Emulation division. We are a worldwide recognized division noted for groundbreaking technology. We are ... and emulator environment issues. + We have continual collaboration with Design, DV , Power, Silicon Validation, Performance, and Software teams. + Work constructively… more