- Qualcomm (San Diego, CA)
- …to design protocol provided Problem-solver: Resolves architecture, design , or verification problems by applying sound ASIC engineering practices ... critical times Feedback: Feedback Silicon learnings to process team, design methodology, IP and SoC design...or Computer Engineering 8+ years of relevant experience in ASIC design , scripting and architecture Minimum Qualifications:… more
- Broadcom, Inc. (San Jose, CA)
- …and IP Integration and system level verification. Experience in design management with detailed knowledge of development methodologies, design flows ... In this highly visible role, you will be responsible for leading the design and development of highly integrated SerDes solutions for the next generation of… more
- Micron Technology (Boise, ID)
- …advance faster than ever. We are seeking a passionate and innovative ATE Test Engineer to develop cutting-edge test solutions for our SSD and UFS controllers using ... and equipment efficiency to maximize ROI. Work closely with design teams to develop design for test...MXS test programming and debug experience. Familiar with testing IP blocks such as PLL, efuse, LDOs, PCIe, Hands… more
- Qualcomm (San Diego, CA)
- …connected future for all. QCT Memory Controller Design Team is looking for ASIC Design Engineers for the next generation high speed DDR Controllers. The ... system such as CPU, DSP, Multimedia Processors and the engineer is expected to be responsible for enabling high...Science, Engineering, or related field and 2+ years of ASIC design , verification, validation, integration, or related… more
- Marvell Technology, Inc. (Santa Clara, CA)
- … solution offers a differentiated approach with a best-in-class portfolio of data infrastructure intellectual property ( IP ) and a wide array of flexible ... have the opportunity to work on both the physical design and methodology for future designs of our next-generation,...key, and you will work closely with the RTL design team to drive modifications that effectively resolve congestion… more
- Advanced Technology Innovation Corp. (Bethlehem, PA)
- FPGA Design Engineer Architecture, implementation, verification/validation of Xilinx FPGAs. Experience with high speed protocols(10G-400G Ethernet, NVM, PCI). ... TCP/ IP , and IP development & integration for...for ARM SOC FPGAs. Implementation of complex algorithms targeting ASIC /FPGAs. Strong skills in VHDL, and FPGA design… more
- Broadcom, Inc. (San Jose, CA)
- …Account, please Sign-In before you apply. Job Description: System Signal/Power Integrity Engineer Responsibilities Support high data rate SerDes applications - up to ... 112Gbps NRZ and 224G PAM4 systems System level Signal and Power Integrity design trade-offs and debug Collaborate with package, PCB, and silicon designers to… more
- Tenstorrent (Fort Collins, CO)
- …floorplanning, clocking, I/O planning and power optimization Discussions with 3rd party IP providers, foundry partners and design services End to end ... implementation with industry standard PnR flows and tools Strong experience in SOC/ ASIC /GPU/CPU design flows on taped out designs, expertise in timing closure at… more
- Meta (Sunnyvale, CA)
- …first-pass silicon success. **Required Skills:** ASIC Engineer , Design Verification Responsibilities: 1. Define and implement IP /SoC verification plans, ... **Summary:** Meta is hiring ASIC Design Verification Engineer ...organization. We are looking for individuals with experience in Design Verification to build IP and System… more
- Meta (Menlo Park, CA)
- …first-pass silicon success. **Required Skills:** ASIC Engineer , Design Verification Responsibilities: 1. Define and implement IP /SoC verification plans, ... **Summary:** Meta is hiring ASIC Design Verification Engineer ...organization. We are looking for individuals with experience in Design Verification to build IP and System… more
- Meta (Menlo Park, CA)
- …a first-pass silicon success. **Required Skills:** ASIC Engineer , Design Verification Responsibilities: 1. Define and implement block/ IP /System on Chip ... **Summary:** Meta is hiring ASIC Design Verification Engineer ...organization. We are looking for individuals with experience in Design Verification to build IP and System… more
- Meta (Menlo Park, CA)
- …first-pass silicon success. **Required Skills:** ASIC Engineer , Design Verification Responsibilities: 1. Define and implement IP /SoC verification plans, ... **Summary:** Meta is hiring ASIC Design Verification Engineer ...organization. We are looking for individuals with experience in Design Verification to build IP and System… more
- Meta (Sunnyvale, CA)
- …To apply, click "Apply to Job" online on this web page. **Required Skills:** ASIC Engineer , Design Verification Responsibilities: 1. Evaluate, develop and ... and NOC subsystems 15. 4. SystemVerilog/UVM methodology or C/C++ based verification 16. 5. ASIC development cycles 17. 6. IP /sub-system or SoC (System On Chip)… more
- Meta (Sunnyvale, CA)
- …on this web page. **Required Skills:** ASIC Engineer , Design Verification Responsibilities: 1. Define and implement block/ IP /SoC verification plans, ... functional tests based on verification test plan. 3. Drive Design Verification to closure based on defined verification metrics...verification. 8. 2. Track record of 'first-pass success' in ASIC development cycles. 9. 3. Experience in block/ IP… more
- Meta (Austin, TX)
- …as machine learning, video transcoding and network acceleration. **Required Skills:** ASIC Engineer , Design Responsibilities: 1. Architecture exploration ... **Summary:** Meta is hiring ASIC Design Engineers within our Infrastructure...2. Micro-architecture development 3. Soft and hard IP identification, selection and integration. Collaboration with verification and… more
- Meta (Menlo Park, CA)
- …complex SoC and IP for data center applications. **Required Skills:** ASIC Engineer , Design Responsibilities: 1. Architecture exploration 2. ... **Summary:** Meta is hiring ASIC Design Engineers within our Infrastructure...Verilog, System Verilog and HLS 4. Soft and hard IP identification, selection and integration 5. Collaboration with verification… more
- Meta (Jackson, MS)
- …on this web page. **Required Skills:** ASIC Engineer , Design Verification Responsibilities: 1. Define and implement IP /SoC verification plans, build ... IP /SoC (System On Chip) Verification 10. 4. Debugging design 11. 5. Functional Coverage 12. 6. Automation Scripting...to $287,650/year + bonus + equity + benefits **Industry:** Internet **Equal Opportunity:** Meta is proud to be an… more
- Cisco (San Jose, CA)
- ASIC Design Engineer - Design &...multiple timing modes + Option to also do block level RTL design or block or top-level IP integration + Helping ... systems, leveraging the latest technology. We're seeking a talented ASIC engineer with a proven track record...of what's possible! **Your Impact** You are a diligent Design /SDC Engineer with strong analytical skills and… more
- Amazon (Austin, TX)
- … design quality and making the right trade-offs. Key job responsibilities As an ASIC Design Engineer , you will: * Develop and implement high-performance, ... rapid integration of emergent technologies. We're looking for an ASIC Design Eengineer to help us trail-blaze...innovate, explore new solutions, and contribute to the company's intellectual property through patents About the team… more
- Arrow Electronics (San Jose, CA)
- **Position:** Senior ASIC Design Engineer (eInfochips Inc) **Job Description:** **What candidate will Be Doing:** + Map multi-million gate SoC designs onto ... prototyping methodology. + **Option to engage in block-level RTL design or block or top-level IP integration.**...by a minimum of 10 years of experience in ASIC or a related field, or a Master's Degree… more
