- Celestial AI (Santa Clara, CA)
- …and packaging suppliers. ABOUT THE ROLE We are looking for a Senior ASIC /VLSI Synthesis and Design Engineer to drive the development of high-performance, ... development, DFT integration, and power analysis. If you have a strong background in ASIC /VLSI design, with deep expertise in synthesis, timing closure, DFT, and… more
- Amazon (Cupertino, CA)
- …of physical design: full chip floorplanning, circuit analysis, power/clock distribution, timing optimization, place and route, power integrity analysis, and physical ... *Collaborate with RTL, DFT designers to ensure high quality design implementation BASIC QUALIFICATIONS Bachelors' degree or higher in Electrical Engineering,… more
- Advanced Micro Devices, Inc (San Jose, CA)
- …of diverse perspectives. AMD together we advance_ THE ROLE: AMD is seeking a ASIC Design Engineer with specific experience with scripting skills around the EDA ... which performs implementation of RTL through pre-netlist synthesis and static timing analysis. He/She will also develop parsers to extract and waive key design… more
- Microchip Technology (San Jose, CA)
- …high-performance IP integrations into Microchip FPGA products Work on architecture & implementation for Analog, ASIC & FPGA design development, integration, and ... system architecture Work cross-functionally with other architects, designers, and back-end implementation teams Lead and manage other engineers in the team… more
- DBSI Services, Inc. (Milpitas, CA)
- Benefits: 401(k) 401(k) matching Relocation bonus Job Title: Physical Design Engineer Location: Milpitas, CA Primary Responsibilities: Pre-layout STA to ascertain ... feasibility, timing constraint validation and feedback tocustomers and design teams...of experience or equivalent experience. MSEE preferred. Experience in ASIC Physical Design; Experience in an SoC product developmentorganization… more
- Neuralink (Fremont, CA)
- …related field, or equivalent experience. Experience working on physical design and implementation of complex ASIC systems at advanced technology nodes, ... The Brain Interfaces Soc Department delivers chip architecture and silicon implementation of neural recording and stimulation system-on-chip (SoC) for high-bandwidth… more
- Qualcomm (Austin, TX)
- …collaborate with cross-functional teams to meet and exceed customer needs. The Power Implementation Engineer will work in QUALCOMMs Adreno GPU team and will ... help create a smarter, connected future for all. As a Qualcomm GPU Engineer , you may architect, design, implement, verify, and/or optimize the performance and power… more
- Meta (Austin, TX)
- …on Chip (SoC) and IP for data center applications. **Required Skills:** ASIC Implementation Engineer - Timing Responsibilities: 1. Develop Timing ... **Summary:** Meta is hiring ASIC Frontend Implementation Engineers within our...blocks and the top-level including SOC. Analyze the inter-block timing and come up with IO budgets for the… more
- NVIDIA (Santa Clara, CA)
- …work, to amplify human inventiveness and intelligence. We are now looking for a motivated ASIC Timing Engineer to join our dynamic and growing team. If ... and/or full chip level. + Help in driving frontend and backend implementation including synthesis, equivalence checking, floor-planning, timing constraints, … more
- NVIDIA (Santa Clara, CA)
- …tradeoffs and methodology on next generation CMOS technology. We are looking for a Senior ASIC Timing Engineer to join our dynamic and growing team! If ... timing such as timing constraints, timing analysis, timing convergence, and ECO implementation . What we need to see: + Hold a BS in Electrical or… more
- NVIDIA (Santa Clara, CA)
- …work, to amplify human inventiveness and intelligence. We are now looking for a motivated ASIC Timing Engineer to join our dynamic and growing team. If ... timing and power convergence, as well as ECO implementation + Apply knowledge and experience to improve ...implementation + Apply knowledge and experience to improve timing convergence flows working with the methodology teams. What… more
- NVIDIA (Santa Clara, CA)
- …for all aspects of timing including setting up timing constraints, timing analysis and closure, ECO implementation , and timing methodologies. + ... MS (or equivalent experience) with 3+ years' experience in ASIC Design and Timing + Hands-on experience...Timing + Hands-on experience in STA tools, ECO implementation , and timing closure of high-speed designs.… more
- NVIDIA (Westford, MA)
- …amplify human inventiveness and intelligence. NVIDIA is looking for best-in-class Senior ASIC Timing Design Engineers to join our outstanding Networking Silicon ... to gds2, including synthesis, equivalence checking, floor-planning, timing constraints, timing and power convergence, and ECO implementation . What we need… more
- Meta (Austin, TX)
- …System on Chip (SoC) and IP for data center applications. **Required Skills:** ASIC Implementation Engineer - Synthesis Responsibilities: 1. Run ... **Summary:** Meta is hiring ASIC Implementation Engineers within our Infrastructure...optimization techniques and generate optimized Gate Level Netlist for Timing , Area, Power 2. Debug the timing /area/congestion… more
- Meta (Sunnyvale, CA)
- … Implementation Engineers within our Infrastructure organization. **Required Skills:** ASIC Implementation Engineer - Static Verification ... TCL, and Make 17. Experience with SOC Design Integration and Front-End Implementation 18. Knowledge of Timing /physical libraries, SRAM Memories 19. Experience… more
- Broadcom (San Jose, CA)
- …major segments of the Semiconductor industry, including AI. Be part of the Design Implementation team within Broadcom ASIC Products Division where we create CMOS ... concept through product release. Become a member of an ASIC design team responsible for all aspects of physical...- Floor planning chips and blocks - Routing - Timing , both mission mode and test modes - Integration… more
- The Boeing Company (Fairfax, VA)
- …Missiles & Weapons; Strike, Surveillance and Mobility; and Autonomous Systems). As an ASIC /FPGA Engineer on the Boeing Electronic Products team you will develop ... of ASIC /FPGA design or verification experience + Experience with ASIC /FPGA architectural definition, and detailed design implementation and functional… more
- SpaceX (Sunnyvale, CA)
- …world-class cross-disciplinary teams (systems, firmware, architecture, design, validation, product engineering, ASIC implementation ). In this role, you will be ... Sr. SOC/ ASIC Physical Design Engineer (Silicon Engineering)...Develop/improve physical design methodologies and automation scripts for various implementation steps + Closely collaborate with the ASIC… more
- SpaceX (Redmond, WA)
- …FPGA design flow (eg synthesis, timing closure, verification) + Work with ASIC backend/ implementation teams as needed + Bring-up and validate ASICs and FPGAs ... FPGA/ ASIC Design Engineer (Silicon Engineering) Redmond,...cross-disciplinary teams (systems, firmware, architecture, design, validation, product engineering, ASIC implementation ). In this role, you will… more
- SpaceX (Bastrop, TX)
- …world-class cross-disciplinary teams (systems, firmware, architecture, design, validation, product engineering, ASIC implementation ). In this role, you will be ... Sr. SOC/ ASIC Physical Design Engineer (Silicon Engineering)...Develop/improve physical design methodologies and automation scripts for various implementation steps + Closely collaborate with the ASIC… more
