- Monster (Albany, NY)
- …multiple sectors (LTH, RIE, INS, MTL, CMP, PLT, WET, RTP, ION, EPI) CMOS Process Integration experience; sustaining and/or developing processes in a 300mm wafer ... fabrication facility. Process Integration experience non- CMOS technologies (MEMS, sensors, magnetics, photonics, etc.) Experience with 2.5D/3D integration and/or… more
- Monster (San Jose, CA)
- …ADC, DAC, LDO, PLL, DLL, PI circuits). Create floorplan and work with layout team to demonstrate post extraction performance Document analysis and simulation to show ... and globally dispersed teams MS EE and 2+ years or PhD EE in CMOS analog/mixed-signal circuit design. Submit resume to ###@OSIengineering.com Tony Do ### x115 Type:… more
- Skyworks (Austin, TX)
- …with frequency and time domain analysis of complex mathematical systems + Familiarity with CMOS layout and layout best practices + Experience with standard ... background, familiarity with schematic capture, architecture definition, circuit implementation, and layout of CMOS analog circuits. Depending on the experience… more
- Skyworks (Austin, TX)
- …frequency and time domain analysis of complex mathematical systems + Familiarity with CMOS layout + Experience with standard electrical engineering lab equipment ... background, familiarity with schematic capture, architecture definition, circuit implementation, and layout of CMOS analog circuits. Depending on experience… more
- NVIDIA (Santa Clara, CA)
- …in writing code in Python and C++ is required + Prior experience in CMOS layout drawing, including schematic-to- layout translation and DRC/LVS compliance, is ... involving Pre-silicon and Post Silicon custom circuit design and related data, Circuit/ Layout Optimization and Spice correlation + Work on projects with applications… more
- Micron Technology, Inc. (Boise, ID)
- …ensure tool integration and usability + Evaluate and debug EDA tools used for CMOS design, layout , and verification + Contribute to continuous improvement of ... process engineers to ensure efficient, reliable, and scalable solutions for CMOS integrated circuit development. **Position Overview** As a Computer Engineer, you… more
- NVIDIA (Santa Clara, CA)
- …5 years industry experience. + Have an in-depth understanding of mosfet device behavior, CMOS layout , and VLSI design. + Experience working with standard cell ... design & layout . + Great interpersonal skills. + A passion for providing excellent support for end-users. NVIDIA offers highly competitive salaries and a… more
- NVIDIA (Santa Clara, CA)
- …Engineering and 4+ year's experience + A basic understanding of mosfet device behavior, CMOS layout , and VLSI design + Excellent programming skills + Experience ... with perl, Cadence SKILL, python, tcl + Great communication skills + Passionate about providing excellent support for end-users. NVIDIA has some of the most forward-thinking and hardworking people in the world working for us and, due to unprecedented growth,… more
- NVIDIA (Santa Clara, CA)
- …5+ years of work experience + A basic understanding of mosfet device behavior, CMOS layout , and VLSI design. + Excellent programming skills; experience with ... perl, Cadence SKILL. + Expertise in ICV in order to support, enhance, and debug foundry DRC and LVS techfiles. + Being able to implement NVIDIA specific DFM, DRC rules using ICV. + Add NVIDIA specific devices in the LVS deck using ICV. + Great interpersonal… more
- NVIDIA (Santa Clara, CA)
- …plus year of work experience + A basic understanding of mosfet device behavior, CMOS layout , and VLSI design. + Understanding of version control software ... preferably Perforce. + Understanding the regression testing methodology. + Excellent programming skills; experience with perl, python and other scripting languages. + Great interpersonal skills + Passionate about providing excellent support for end-users.… more
- Micron Technology, Inc. (Boise, ID)
- …the world to learn, communicate and advance faster than ever. As an Advanced CMOS Device & Process Integration Engineer, you will play a crucial role in the ... development of current and future CMOS technology. You will be responsible for device and...with teams across the organization including Process, Circuit, Design, Layout , Product Engineering, and Modeling/TCAD. Your expertise will be… more
- Micron Technology, Inc. (Richardson, TX)
- …verification methodologies, flows, and quality metrics. + 5+ years of experience in CMOS circuit design, layout , and verification. + 5+ years of experience ... and methodologies for next-generation memory designs. Collaborating closely with design, layout , verification, modeling, and process teams, you will be integral in… more
- NVIDIA (Santa Clara, CA)
- …and layout design. + Deep understanding of digital and analog circuit layout concepts in submicron CMOS technologies. + Strong background with Cadence custom ... on all the NVIDIA products! What you'll be doing: + Perform physical layout for custom embedded SRAM structures in state-of-the-art sub-micron CMOS technologies… more
- Global Foundries (Malta, NY)
- …you will contribute to the advancement of Ultra Low Power (ULP) CMOS technologies for applications including Automotive, IoT, Aerospace & Defense, and Smart ... roadmap and manufacturing goals. Essential Responsibilities include: + Device test chip layout design + Inline and bench electric test submission and analysis +… more
- Micron Technology, Inc. (Boise, ID)
- …and tapeout to assist in product development. + Good understanding of basic CMOS process manufacturing and layout design rules. + Understanding of ... development of advanced process technology through scribe test structure design and layout , CAD, and reticle creation. Job Responsibilities + Contribute to the… more
- Power Integrations (San Jose, CA)
- …+ Ability to interpret system level schematics, the IC level schematics, and IC layout of CMOS and bipolar devices is required. Preferences will be given ... to candidates who have a thorough understanding of analog, mixed-signal, or power semiconductor operational characteristics and the ability to apply fault isolation techniques at chip level as well as PCB at power supply system level. Education: + Must have BS… more
- Capgemini (Minneapolis, MN)
- **About the job you're considering** * 10 years of experience in analog/mixed-signal layout design of deep submicron CMOS circuits and at least 3 years of recent ... * Lead layout team in completing complex layout for analog/mixed-signal circuits in deep submicron CMOS technologies * Be a great role model, by inspiring… more
- University of Southern California (Los Angeles, CA)
- …& Layout EngineerApply (https://usc.wd5.myworkdayjobs.com/ExternalUSCCareers/job/Marina-Del-Rey-CA/Analog-Design Layout -Engineer\_REQ20164538/apply) Viterbi ... of the following: analog circuit/RF design, digital circuit design, and physical layout implementation. The successful candidate will work directly with MOSIS 2.0… more
- NVIDIA (Santa Clara, CA)
- …experience in Mask and Layout Design. + Deep understanding of analog circuit layout concepts in submicron CMOS technologies. + You are an authority with ... This is our life's work, to amplify human creativity and intelligence. Are you a Mask Layout Design Engineer? If yes, We would love to hear from you! We are looking… more
- NVIDIA (Santa Clara, CA)
- …experience in Mask and Layout Design. + Deep understanding of analog circuit layout concepts in submicron CMOS technologies. + You are an authority with ... from you! We are looking for a Senior Mask Layout Design Engineer, someone who is excited to join...to Digital converters, ESD structures designs in state-of-the-art sub-micron CMOS technologies using Cadence tools. + You'll work cross… more
