• DFT Engineer (Server)

    Qualcomm (San Diego, CA)
    EDA ATPG and insertion tools. + Experience in DFT implementation, Scan/ATPG, MBIST insertion/validation, coverage analysis. **Minimum Qualifications:** * ... who will be responsible for the implementation and verification of advanced DFT /DFD (Design for Test/Design for Debug) techniques for low power, multi voltage… more
    Qualcomm (04/08/25)
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  • Principal Software Engineer - RTL

    Siemens (Wilsonville, OR)
    Job Family: Software Req ID: 450920 Siemens EDA is a global technology leader in Electronic Design Automation software. Our software tools enable companies around ... design. Tessent is looking for a highly motivated, creative, and energetic engineer with expertise in digital circuit design and verification to strengthen our… more
    Siemens (03/04/25)
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  • Senior Test Engineer

    Medtronic (Tempe, AZ)
    We anticipate the application window for this opening will close on - 11 Jun 2025 Position Description: Sr. Test Engineer for Medtronic, Inc located in Tempe, ... Test Equipment) to test multi-chip electronic assembly intended for medical device application . Responsible for PCB (Printed Circuit Board) design using EDA more
    Medtronic (04/08/25)
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  • Sr Principal Application Engineer

    Cadence Design Systems, Inc. (San Jose, CA)
    …related field + Prior experience with IC digital implementation flows and font-end EDA tools including Synthesis, DFT , and Logical Equivalence Checking + Prior ... skills. Key Responsibilities + Be part of team of Application Engineers providing technical support to Cadence customers in...Prior experience with IC digital implementation flows and backend EDA tools including Place and Route, IR Drop, backend… more
    Cadence Design Systems, Inc. (04/19/25)
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  • Physical Design Engineer , Static Timing…

    Google (Sunnyvale, CA)
    …and timing ECO creation, timing margins). + Experience with Electronic Design Automation ( EDA ) tools (ie, Primetime, Tempus, Timevision, STAR-RC) and EDA Tcl ... In this role, you will work on the physical implementation of Application -specific integrated circuits (ASIC) using advanced technology nodes. You will work on… more
    Google (04/23/25)
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  • Sr. Physical Design Methodology Engineer

    Amazon (Cupertino, CA)
    …of emergent technologies. We're looking for an ASIC Physical Design Methodology Engineer to help us trail-blaze new technologies and architectures, while ensuring ... work. Interface directly with RTL, Physical Design, Package Design, DFT and other teams to improve methodologies and efficiencies...and efficiencies and drive efforts to resolution. Work with EDA tool vendors to evaluate new methods, solve bugs,… more
    Amazon (03/29/25)
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  • SOC/ASIC Physical Design Engineer (Silicon…

    SpaceX (Sunnyvale, CA)
    SOC/ASIC Physical Design Engineer (Silicon Engineering) Sunnyvale, CA Apply SpaceX was founded under the belief that a future where humanity is out exploring the ... ultimate goal of enabling human life on Mars. SOC/ASIC PHYSICAL DESIGN ENGINEER (SILICON ENGINEERING) At SpaceX we're leveraging our experience in building rockets… more
    SpaceX (04/15/25)
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  • Sr. SOC/ASIC Physical Design Engineer

    SpaceX (Bastrop, TX)
    Sr. SOC/ASIC Physical Design Engineer (Silicon Engineering) Bastrop, TX Apply SpaceX was founded under the belief that a future where humanity is out exploring the ... goal of enabling human life on Mars. SR. SOC/ASIC PHYSICAL DESIGN ENGINEER (SILICON ENGINEERING) At SpaceX we're leveraging our experience in building rockets… more
    SpaceX (04/15/25)
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  • Physical Design Methodology Engineer

    Amazon (Austin, TX)
    …AI services for our customers' businesses. We are seeking experienced Physical Design Engineer to build the next generation of our cloud server platforms. Our ... performance at low cost. You'll provide leadership in the application of new technologies to large scale deployments in...- Interface directly with RTL, Physical Design, Package Design, DFT and other teams to improve methodologies and efficiencies… more
    Amazon (03/04/25)
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  • ASIC Physical Design Engineer Intern,…

    Amazon (Cupertino, CA)
    …hours/week) for 12 consecutive weeks during summer. By applying to this position, your application will be considered for all locations we hire for in the United ... physical design flows and methods * Collaborate with RTL, DFT designers to ensure high quality design implementation Basic...with Place and Route, digital implementation - Experience with EDA tools from Synopsys (ICC2, DC, PT), Cadence (Genus,… more
    Amazon (04/04/25)
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  • Principal Custom ASIC Engineering Lead

    Broadcom (San Jose, CA)
    …Description:** **Senior Custom ASIC Engineering Lead** Are you a versatile, senior engineer capable of leading external and internal cross-functional teams in areas ... such as physical design, STA, DFT , and packaging? Have you taped out so many...that you can identify potential design problems hidden in EDA reports, advise design teams on how to fix… more
    Broadcom (02/21/25)
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  • PCB Designer (Semi Test Engineering; Deer Park,…

    Teradyne (Lake Zurich, IL)
    …the Teradyne product line has resulted in a need for Senior Level PCB Designer/ Engineer who can integrate with hardware engineering and participates as a key person ... and Product Manager. + Act as a PCB design engineer for complex circuit architecture / designs. + On...rules) with those of the manufacturing standards (DFM and DFT ). + Implement PCB design requirements from the development… more
    Teradyne (04/12/25)
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