- Meta (Sunnyvale, CA)
- …efficient System on Chip (SoC) and IP for data center applications. **Required Skills:** ASIC Engineer , EDA Infrastructure Responsibilities: 1. Front End ... **Summary:** Meta is hiring ASIC EDA Infrastructure Engineers within our Infrastructure organization. We are looking for individuals with experience in … more
- NVIDIA (Santa Clara, CA)
- …the GPU in 1999 to reshape PC gaming and modern computer graphics. As an engineer in our EDA Workflow Optimization team, you will partner closely with our ... infrastructure . You will work with your team of EDA and software experts to build new infrastructure...compute) our chip engineers depend on. + Experience with ASIC , VLSI, CAD/ EDA or mixed signal design… more
- Meta (Austin, TX)
- …System on Chip (SoC) and IP for data center applications. **Required Skills:** ASIC Engineer , Physical Design Responsibilities: 1. Develop and own physical ... **Summary:** Meta is hiring ASIC Physical Design Engineers within our Infrastructure...resolve congestion/timing issues and implement functional ECO's 7. Use EDA tool-based programming and scripting techniques to automate and… more
- Meta (Sunnyvale, CA)
- **Summary:** Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in ... Post-Silicon teams towards creating a first-pass silicon success. **Required Skills:** ASIC Engineer , Network Design Verification Responsibilities: 1. Define and… more
- Meta (Austin, TX)
- **Summary:** Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in ... Post-Silicon teams towards creating a first-pass silicon success. **Required Skills:** ASIC Engineer , Design Verification Responsibilities: 1. Define and… more
- Meta (Austin, TX)
- **Summary:** Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in ... Post-Silicon teams towards creating a first-pass silicon success. **Required Skills:** ASIC Engineer , Design Verification Responsibilities: 1. Define and… more
- Meta (Sunnyvale, CA)
- **Summary:** Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in ... Post-Silicon teams towards creating a first-pass silicon success. **Required Skills:** ASIC Engineer , Design Verification Responsibilities: 1. Define and… more
- Meta (Sunnyvale, CA)
- …DFT EDA tools and IEEE standards (1149, 1500, 1687). **Required Skills:** ASIC Engineer , DFT Responsibilities: 1. Develop and implement DFT strategies for ... **Summary:** Meta is hiring ASIC DFT Engineers within our Infrastructure ...test time, and in-system test 2. Proficiently use Siemens/Synopsys EDA tools for DFT-related tasks, including MBIST, scan insertion,… more
- Meta (Boston, MA)
- **Summary:** Meta is hiring ASIC Formal Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in ... Post-Silicon teams towards creating a first-pass silicon success. **Required Skills:** ASIC Engineer , Formal Verification Responsibilities: 1. Provide technical… more
- Ralliant (Beaverton, OR)
- …from silicon characterization. + Leading a design review or mentoring a junior engineer . + Evaluating new EDA tools or semiconductor technologies for adoption. ... **Job Summary:** We are seeking a dynamic and experienced ASIC Development Manager to lead and grow a multidisciplinary...to improve productivity and reduce risk. + Collaborate with EDA vendors and foundries to ensure toolchain compatibility and… more
- Broadcom (San Jose, CA)
- …RTL experience including specification, design, verification, and synthesis. Must have strong UNIX-based EDA tool skills and knowledge of ASIC design flows. Must ... challenged and gain valuable experience towards enhancing a successful career in ASIC design. You will involve in engineering implementation spec writing from… more
- Cisco (Maynard, MA)
- Senior ASIC Timing Engineer Apply (https://jobs.cisco.com/jobs/Login?projectId=1449290) + Location:Maynard, Massachusetts, US + Area of InterestEngineer - ... the top level, drive closure of timing across the team. Interface with EDA vendors on issues/features/enhancements on timing tools. + Work closely with RTL designers… more
- Amazon (Austin, TX)
- …compute clusters, infrastructure automation of hardware/software/firmware testing, and ASIC / EDA development. You will influence within your team, your ... of talent, we've been able to improve AWS cloud infrastructure in networking and security with products such as...role involves developing a broad range of skills. The engineer leverages their Linux skills to troubleshoot, innovate fixes… more
- Google (Sunnyvale, CA)
- …. **Responsibilities** + Architect and implement next generation Physical Design EDA CAD tool workflows for ASIC development. + Collaborate ... Physical Design Flow and Methodology Engineer _corporate_fare_ Google _place_ Sunnyvale, CA, USA **Mid**...equivalent practical experience. + 5 years of experience with EDA tool workflows in a semiconductor environment. + Experience… more
- Broadcom (Allentown, PA)
- …guidelines **Knowledge and Experience required:** + A good understanding of IP & ASIC design methodologies + Extensive experience with EDA DRC/LVS support + ... please Sign-In before you apply.** **Job Description:** **Design Automation Engineer ** This position is part of a team tasked...with the support of IC Designs for IPs and ASIC designs. Commitment to team success, customer satisfaction, first… more
- NVIDIA (Santa Clara, CA)
- …Knowledge of DC/Transient, Cross corner PVT and Monte Carlo simulations. + Previous work in VLSI, ASIC , or EDA is a definite plus. + Ability to use the latest AI ... the world! We are currently looking for a Software/CAD engineer to join our team of dedicated engineers developing...+ Employ good software engineering practices to develop efficient EDA /CAD tools for chip development. + Build flows and… more
- Amazon (Cupertino, CA)
- …massive scale and rapid integration of emergent technologies. We're looking for an ASIC Physical Design Methodology Engineer to help us trail-blaze new ... the world. Amazon Web Services provides a highly reliable, scalable, low-cost infrastructure platform in the cloud that powers hundreds of thousands of businesses… more
- Meta (Menlo Park, CA)
- **Summary:** Meta is seeking a versatile Hardware Engineer to join our Compute Hardware team. Our mission is backed by a massive hardware infrastructure . Our ... cutting-edge data centers affecting billions of users. **Required Skills:** Hardware Engineer Responsibilities: 1. Work with local and remote teams and suppliers,… more
- Amazon (Austin, TX)
- …massive scale and rapid integration of emergent technologies. We're looking for an ASIC Physical Design Engineer to help us trail-blaze new technologies and ... Amazon Web Services provides a highly reliable, scalable, low-cost infrastructure platform in the cloud that powers hundreds of...MS + 6yrs in EE/CS - 6+ years in ASIC Physical Design from - RTL-to-GDSII in either 7nm,… more
- NVIDIA (Santa Clara, CA)
- …motivated, and committed. Ways to stand out from the crowd: + Previous work in VLSI, ASIC , or EDA is a definite plus + Experience with .lib characterization flow ... world! We are currently looking for a Senior Methodology Engineer to develop and support our CAD tooling in...improve efficiency + Build flows and methodology around vendor EDA tool and design collaterals to streamline design and… more