- Meta (Austin, TX)
- …a first-pass silicon success. **Required Skills:** ASIC Engineer , Design Verification Responsibilities: 1. Define and implement block/ IP /System on Chip ... **Summary:** Meta is hiring ASIC Design Verification Engineer ...organization. We are looking for individuals with experience in Design Verification to build IP and System… more
- Meta (Sunnyvale, CA)
- …first-pass silicon success. **Required Skills:** ASIC Engineer , Design Verification Responsibilities: 1. Define and implement IP /SoC verification plans, ... **Summary:** Meta is hiring ASIC Design Verification Engineer ...organization. We are looking for individuals with experience in Design Verification to build IP and System… more
- Meta (Sunnyvale, CA)
- …first-pass silicon success. **Required Skills:** ASIC Engineer , Design Verification Responsibilities: 1. Define and implement IP /SoC verification plans, ... **Summary:** Meta is hiring ASIC Design Verification Engineer ...organization. We are looking for individuals with experience in Design Verification to build IP and System… more
- Meta (Sunnyvale, CA)
- …To apply, click "Apply to Job" online on this web page. **Required Skills:** ASIC Engineer , Design Verification Responsibilities: 1. Evaluate, develop and ... and NOC subsystems 15. 4. SystemVerilog/UVM methodology or C/C++ based verification 16. 5. ASIC development cycles 17. 6. IP /sub-system or SoC (System On Chip)… more
- Meta (Jackson, MS)
- …on this web page. **Required Skills:** ASIC Engineer , Design Verification Responsibilities: 1. Define and implement IP /SoC verification plans, build ... IP /SoC (System On Chip) Verification 10. 4. Debugging design 11. 5. Functional Coverage 12. 6. Automation Scripting...to $287,650/year + bonus + equity + benefits **Industry:** Internet **Equal Opportunity:** Meta is proud to be an… more
- Cisco (San Jose, CA)
- ASIC Design Engineer - Design &...multiple timing modes + Option to also do block level RTL design or block or top-level IP integration + Helping ... systems, leveraging the latest technology. We're seeking a talented ASIC engineer with a proven track record...of what's possible! **Your Impact** You are a diligent Design /SDC Engineer with strong analytical skills and… more
- Meta (Sunnyvale, CA)
- …on Chip (SoC) and IP for data center applications. **Required Skills:** ASIC Engineer , Physical Design Responsibilities: 1. Develop and own physical ... 3. Deliver physical design of an end-to-end IP or integration of ASIC /SoC design...to $203,000/year + bonus + equity + benefits **Industry:** Internet **Equal Opportunity:** Meta is proud to be an… more
- Meta (Austin, TX)
- …on Chip (SoC) and IP for data center applications. **Required Skills:** ASIC Engineer , Physical Design Responsibilities: 1. Develop and own physical ... 3. Deliver physical design of an end-to-end IP or integration of ASIC /SoC design...to $203,000/year + bonus + equity + benefits **Industry:** Internet **Equal Opportunity:** Meta is proud to be an… more
- Amazon (Austin, TX)
- … design quality and making the right trade-offs. Key job responsibilities As an ASIC Design Engineer , you will: * Develop and implement high-performance, ... rapid integration of emergent technologies. We're looking for an ASIC Design Eengineer to help us trail-blaze...innovate, explore new solutions, and contribute to the company's intellectual property through patents About the team… more
- Arrow Electronics (San Jose, CA)
- **Position:** Senior ASIC Design Engineer (eInfochips Inc) **Job Description:** **What candidate will Be Doing:** + Map multi-million gate SoC designs onto ... prototyping methodology. + **Option to engage in block-level RTL design or block or top-level IP integration.**...by a minimum of 10 years of experience in ASIC or a related field, or a Master's Degree… more
- NVIDIA (Austin, TX)
- …can make a lasting impact on the world. Join the NVIDIA System-On-Chip (SOC) group as an ASIC Design Engineer and make a broad impact. You will focus on ... improving methodologies and delivering system-level IP to measure performance across multiple projects. What you'll...system + Run and debug RTL checks to ensure design quality (eg, cross clock domains (CDC), clocks, reset,… more
- NVIDIA (Austin, TX)
- …can make a lasting impact on the world. Join the NVIDIA System-On-Chip (SOC) group as an ASIC Design Engineer and make a broad impact. You will focus on ... improving methodologies and delivering system-level IP to measure performance across multiple projects. What you'll...engineers. + Learn and run RTL checks to ensure design quality (eg, cross clock domains (CDC), clocks, reset,… more
- Google (Mountain View, CA)
- …with an emphasis on computer architecture. + 10 years of industry experience with IP design . + Experience with methodologies for low power estimation, timing ... or equivalent practical experience. + 8 years of experience with RTL design using Verilog/System Verilog and microarchitecture. + Experience with a scripting… more
- Qualcomm (San Diego, CA)
- …Engineering Group > ASICS Engineering **General Summary:** Qualcomm mixed-signal IP design team is seeking talented senior ASIC digital designers to join ... definition of the high-speed interfaces - Define, document and design the microarchitecture of IP blocks -...- Assist in running the full suite of front-end ASIC design tools (lint checking, CDC, DFT,… more
- Qualcomm (San Diego, CA)
- …applications. QCT mixed-signal design team consists of architects and ASIC designers, protocol experts, signal processing engineers, and algorithm designers ... Design **General Summary:** Job Description QCT mixed-signal IP design team is looking for talented...course selections and/or work experience. + Experience working with ASIC design tools such as Cadence Virtuoso.… more
- Qualcomm (San Diego, CA)
- …design by course selections and/or work experience. + Experience working with ASIC design tools such as Cadence Virtuoso. **Preferred Qualifications** + ... Area:** Engineering Group, Engineering Group > Analog Mixed Signal Design **General Summary:** QCT Mixed-Signal IP (MSIP)...nanometer planar CMOS or FinFET and 2+ years of ASIC design , verification, or related work experience.… more
- The Boeing Company (Tukwila, WA)
- …& Weapons Systems has an exciting opportunity for an ** ASIC and/or FPGA Design and Verification Engineer ** (Experienced, Lead or Senior) to join us as part ... Strike, Surveillance and Mobility; and Autonomous Systems). As an ASIC /FPGA Engineer on the Boeing Electronic Products...physical design realization (through gate-level netlists for ASIC designs) + Integrate DSP IP from… more
- Amazon (San Diego, CA)
- …around the world. Come work at Amazon! We're hiring a Sr. Modem Design Engineer within a high performance ASIC design team. This team is using ... industry leading methodologies to develop proprietary IP 's. The Role: Be part of Project Kuiper's sub-team...models in MATLAB. - Involve in control plane logic design and interfaces to bus fabrics. - Explore and… more
- Qualcomm (San Diego, CA)
- …Science, or a closely related field + 2+ years of experience with ASIC design and verification tools, techniques, and methodology **Preferred Qualifications** + ... , Computer Engineering, or a closely related field + 3+ years of experience with ASIC design and verification tools, techniques, and methodology + 3+ years of… more
- The Boeing Company (Fairfax, VA)
- …through HDL coding, and physical design realization (through gate-level netlists for ASIC designs) + Integrate DSP IP from Boeing's algorithm team and ... & Weapons Systems has an exciting opportunity for multiple ** ASIC and/or FPGA Design and Verification Engineers...Strike, Surveillance and Mobility; and Autonomous Systems). As an ASIC /FPGA Engineer on the Boeing Electronic Products… more