- NVIDIA (Santa Clara, CA)
- We are now looking for a ASIC Floorplan Design Engineer - NCG. NVIDIA is seeking a talented ASIC Floorplan Engineer to design and ... development. + Drive the area review process and collaborate with the ASIC design team to identify area, interconnect and floorplan improvement opportunities… more
- NVIDIA (Santa Clara, CA)
- …work, to amplify human inventiveness and intelligence. We are now looking for a motivated ASIC Physical Design Engineer to join our dynamic and growing team. ... PPA for high-performance designs, eg Nvidia's CPUs and GPUs. + Explore design space, create optimum floorplan , drive synthesis, physical implementation, and… more
- Meta (Menlo Park, CA)
- …create as part of a world-class engineering team. **Required Skills:** Package Design Engineer Responsibilities: 1. Drive chip-package-system co- design by ... **Summary:** Meta is looking for an experienced ASIC Packaging Engineer , Signal Integrity, and...silicon, architecture and system teams and externally engaged partners, ASIC design partners, foundry and OSAT and… more
- Cisco (San Jose, CA)
- Physical Design Lead Engineer Apply (https://jobs.cisco.com/jobs/Login?projectId=1436295) + Location:San Jose, California, US + Area of InterestEngineer - ... Science, with 10+ year minimum of hands-on experience in ASIC implementation and Physical verification + Experience in deep...design teams. + Experience working with Package and floorplan teams to define padring and bump-map design… more
- Qualcomm (San Diego, CA)
- …Bachelor's degree in Science, Engineering, or related field and 4+ years of ASIC design , verification, validation, integration, or related work experience. OR ... chips. + Develop CAD tools for optimization of Synthesis, Floorplan , Place and Route and Design closure....Science, Engineering, or related field and 3+ years of ASIC design , verification, validation, integration, or related… more
- Broadcom (San Jose, CA)
- …In this highly visible role, you will be responsible for leading the design and development of highly integrated SerDes solutions for the next generation of ... or Computer Engineering with 13+ years of experience in front end digital design for serial high-speed data center networking applications.** + **Experience as a… more
- Qualcomm (San Diego, CA)
- …Bachelor's degree in Science, Engineering, or related field and 4+ years of ASIC design , verification, validation, integration, or related work experience. OR ... data analysis, and results summary 4. Knowledge of digital design PnR from floorplan stage and IP...Science, Engineering, or related field and 3+ years of ASIC design , verification, validation, integration, or related… more
- Qualcomm (San Diego, CA)
- …Bachelor's degree in Science, Engineering, or related field and 8+ years of ASIC design , verification, validation, integration, or related work experience. OR ... Master's degree in Science, Engineering, or related field and 7+ years of ASIC design , verification, validation, integration, or related work experience. OR PhD… more
Locations:
California