- SpaceX (Sunnyvale, CA)
- ASIC / SOC DFT Engineer (Silicon Engineering) Sunnyvale, CA Apply SpaceX was founded under the belief that a future where humanity is out exploring the ... to make this possible, with the ultimate goal of enabling human life on Mars. ASIC / SOC DFT ENGINEER (SILICON ENGINEERING) At SpaceX we're leveraging our… more
- SpaceX (Sunnyvale, CA)
- Sr. SOC / ASIC DFT Engineer (Silicon Engineering) Sunnyvale, CA Apply SpaceX was founded under the belief that a future where humanity is out exploring the ... make this possible, with the ultimate goal of enabling human life on Mars. SR. SOC / ASIC DFT ENGINEER (SILICON ENGINEERING) At SpaceX we're leveraging our… more
- SpaceX (Irvine, CA)
- Sr. SOC / ASIC Physical Design Engineer (Silicon Engineering) Irvine, CA Apply SpaceX was founded under the belief that a future where humanity is out ... ultimate goal of enabling human life on Mars. SR. SOC / ASIC PHYSICAL DESIGN ENGINEER (SILICON...CMOS analog circuit and physical design + Knowledge of DFT /Scan/MBIST/LBIST and understanding of their impact on physical design… more
- SpaceX (Bastrop, TX)
- Sr. SOC / ASIC Physical Design Engineer (Silicon Engineering) Bastrop, TX Apply SpaceX was founded under the belief that a future where humanity is out ... ultimate goal of enabling human life on Mars. SR. SOC / ASIC PHYSICAL DESIGN ENGINEER (SILICON...CMOS analog circuit and physical design + Knowledge of DFT /Scan/MBIST/LBIST and understanding of their impact on physical design… more
- SpaceX (Sunnyvale, CA)
- Sr. SOC / ASIC Physical Design Methodology/CAD Engineer (Silicon Engineering) Sunnyvale, CA Apply SpaceX was founded under the belief that a future where ... ultimate goal of enabling human life on Mars. SR. SOC / ASIC PHYSICAL DESIGN METHODOLOGY/CAD ENGINEER ...+ Interface directly with RTL, physical design, package design, DFT and other teams to improve methodologies and efficiencies… more
- Broadcom (San Jose, CA)
- …have a Candidate Account, please Sign-In before you apply.** **Job Description:** **Principal DFT Engineer ** Broadcom's ASIC Product Division is seeking ... to production. The candidate would be required to work on various phases of SoC DFT related activities for Broadcom APD ( ASIC Products Division)'s designs - … more
- Cadence Design Systems, Inc. (San Jose, CA)
- …world of technology. We are looking for SoC / ASIC Digital Design Engineer with experience in Design for Test ( DFT ). An intimate knowledge and experience ... preferred. + Prior 5-15 years of professional experience in SoC / ASIC Digital Design with focus on Design... Digital Design with focus on Design for Test ( DFT ) + Should possess intimate knowledge of DFT… more
- NVIDIA (Santa Clara, CA)
- We are now looking for a Senior ASIC Design Engineer - DFX NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 sparked ... in shaping the architecture, design, implementation, and verification of DFT IPs for our next-generation SoC products....verification of DFT IPs for our next-generation SoC products. You'll help drive innovation across the full… more
- NVIDIA (Santa Clara, CA)
- NVIDIA is looking for an ASIC Design Engineer to join our Memory Subsystem Team! As an ASIC Design engineer at NVIDIA, you'll join a group of ... like CHI/CXL/PCI-E is a plus. + Experience with all stages in the ASIC design flow including emulation, prototyping, DFT , timing analysis, floor planning,… more
- Amazon (Austin, TX)
- …trade-offs. Key job responsibilities - integrate multiple subsystems into top level SOC , ensure correct clock/reset/functional/ DFT signal routing - As a key ... rapid integration of emergent technologies. We're looking for an ASIC Design Eengineer to help us trail-blaze new technologies...technical field - 5+ years in RTL design for SOC - 5+ years of VLSI engineering - 5+… more
- Meta (Sunnyvale, CA)
- …click "Apply to Job" online on this web page. **Required Skills:** ASIC Engineer , Implementation Responsibilities: 1. Run logic/physical synthesis using advanced ... work w/ designers to create waivers. 6. Perform RTL DFT analysis and improve DFT coverage for...for RTL-synthesis and PrimeTime-STA for blocks and top-level including SOC . 11. Analyze inter-block timing and create IO budgets… more
- Amazon (Austin, TX)
- …Develop and maintain comprehensive gate-level simulation test plans for verifying ASIC functionality and timing. Analyze simulation results, identify and debug logic ... Work closely with the system architects to develop world-class SOC and IP blocks, which meet power, area and.... Understand low power design & the impact of DFT on the blocks . Perform initial synthesis &… more
- Amazon (Austin, TX)
- …Develop and maintain comprehensive gate-level simulation test plans for verifying ASIC functionality and timing. Analyze simulation results, identify and debug logic ... Work closely with the system architects to develop world-class SOC and IP blocks, which meet power, area and.... Understand low power design & the impact of DFT on the blocks . Perform initial synthesis &… more
- NVIDIA (Santa Clara, CA)
- The NVIDIA Clocks Team is looking for an excellent Senior ASIC Verification engineer with extensive experience in Design Verification. The NVIDIA Clocks Team is ... high-quality clocking and reset logic to various units in SOC and GPU ASIC . The complexity of...implementing Test plans for pre-silicon platforms. + Understanding of DFT /IST is optional. We have some of the most… more
- NVIDIA (Santa Clara, CA)
- …Make the choice to join us today. The clocks group is looking for a top-notch ASIC engineer to join the team. The Team is responsible for crafting all aspects ... we deliver clock RTL information to GPU, CPU and SOC verification team, timing and DFT teams.... teams. + Get involved in end-to-end cycle of ASIC execution starting from micro-arch, design implementation, design fixes,… more
- SpaceX (Sunnyvale, CA)
- …bus routing, sequential pipeline planning and top level design for testability ( DFT ) planning + Collaborate with chip architects, ASIC engineers, package ... Sr. Full Chip Physical Design Engineer (Silicon Engineering) Sunnyvale, CA Apply SpaceX was founded under the belief that a future where humanity is out exploring… more
- Cisco (San Jose, CA)
- …to optimize test efficiency and drive yield improvements. Collaborate with Design, SoC , DFT , Reliability, Quality, Failure Analysis and Manufacturing teams to ... As part of the team you will collaborate with ASIC design teams in the Central Hardware Group, peer...Operations, and with Cisco Systems NPI teams. Collaborate with DFT , Reliability, Quality, Failure Analysis and Manufacturing teams to… more
- IBM (Poughkeepsie, NY)
- …**Required technical and professional expertise** * 5+ years of hands-on experience in DFT implementation for complex ASIC / SoC designs in advanced process ... high-performance silicon in innovative ways. We're looking for a DFT Engineer who values teamwork and brings..., you will be responsible for architecting and implementing DFT strategies for complex SoC designs using… more
- Cisco (San Jose, CA)
- …number of applications are received. Meet The Team You will collaborate with ASIC design teams in the Central Hardware Group, peer Test Engineers in Silicon ... test activities. Your Impact You will be a Test Engineer in Silicon Operations focusing on the ATE test...ATE test bring-up. You will partner with the Cisco ASIC team to bring up tests, characterize units, and… more