• Senior Analog Layout Engineer

    Capgemini (Santa Clara, CA)
    …understanding of thermal and electro migration-aware techniques. + Proficient in Synopsys, Cadence , and Mentor layout tools; Python scripting experience is a ... job you're considering** We are seeking a Senior Analog Layout Design Engineer with deep expertise in advanced CMOS...will collaborate with circuit and verification teams to align layout with functional and performance goals and lead the… more
    Capgemini (05/28/25)
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  • PDK Design Automation Engineer

    IBM (Albany, NY)
    …or Synopsys ICV. * Pcell Creation: Create, maintain, and support parameterized layout cells (pcells) using Cadence Skill and related scripting languages. ... purposes, with 3+ years of experience. * Familiarity with layout verification tools from Cadence Pegasus, Synopsys ICV, or Siemens Calibre, including design rule… more
    IBM (04/30/25)
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  • Design Automation and Infrastructure Engineer

    IBM (Albany, NY)
    …with experience in VLSI chip development or semiconductor technology * Experience using the Cadence Virtuoso layout design tool, at least 3 years * Experience ... design infrastructure development (SKILL, Python or Perl scripting) * Familiarity with layout verification tools from Cadence Pegasus, Synopsys ICV, or Siemens… more
    IBM (05/20/25)
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  • Principal IC Design Engineer

    Medtronic (Mounds View, MN)
    …directions that drive signal integrity, matching, thermal, etc. * Direct and review IC layout activities within Cadence Layout tools. * Create parasitic ... responsibility for IC design, circuit requirements definition, simulation analysis, layout direction, circuit evaluation, system level evaluation, verification testing,… more
    Medtronic (04/30/25)
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  • Principal PCB & Substrate Layout Engineer

    Belcan (Phoenix, AZ)
    …as a PCB and/or High-Density Package Layout designer using industry standard layout tools like Cadence APD+ * Experience with APD+ physical and electrical ... substrate stacking and other techniques * Experience using a Cadence schematic / netlist driven CAD layout process, eg Cadence APD+ (Allegro) and supporting… more
    Belcan (06/03/25)
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  • Principal PCB & Substrate Layout Engineer

    PDS Defense (Phoenix, AZ)
    …as a PCB and/or High-Density Package Layout designer using industry standard layout tools like Cadence APD* Experience with APD+ physical and electrical ... substrate stacking and other techniques * Experience using a Cadence schematic / netlist driven CAD layout process, eg Cadence APD+ (Allegro) and supporting… more
    PDS Defense (05/29/25)
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  • Senior Package Layout Engineer - Hardware

    NVIDIA (Santa Clara, CA)
    …power distribution using Cadence APD or SiP tool suite. + Propose layout design trade-offs to the Technical Package Lead for resolution and implementation. + ... and flip chip packages, preferred + Significant background with Cadence APD or SiP and/or PCB layout ...with Cadence APD or SiP and/or PCB layout tools (including Constraint Manager) + Solid understanding of… more
    NVIDIA (05/21/25)
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  • PCB Layout Engineer

    Meta (Sunnyvale, CA)
    …technologies 21. Experience with SiP technologies 22. 10+ years of experience of PCB layout design using Cadence Allegro 23. Proven track record of designing and ... **Summary:** Meta Reality Labs is seeking a PCB Layout Engineer. In this role you will be...5+ years of PCB design experience 11. Experience with Cadence tool sets or similar technologies 12. Experience in… more
    Meta (06/03/25)
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  • Analog Design Architect

    Cadence Design Systems, Inc. (San Jose, CA)
    …environment + Position requires proficiency in using CAD tools for circuit simulation, layout , and physical verification + Cadence tool experience, lab test ... At Cadence , we hire and develop leaders and innovators...plus + MS or PhD in EE Company Information: Cadence is the global leader in software, hardware, and… more
    Cadence Design Systems, Inc. (03/31/25)
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  • Hardware Development Engineer , Customer Terminals

    Amazon (Redmond, WA)
    …tool - Familiarity with EMI/EMC design mitigation - Experience with Mentor Graphics or Cadence layout tools - Previous work experience in a programming languages ... blocks of electronics sub-systems -Schematic capture and lead PCB layout -Lead PCB vendor engagement for DFM review -Optimize...- 3+ years of experience of mixed signal PCB layout designs - 3+ years of experience in using… more
    Amazon (05/30/25)
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  • ECAD Designer/Electrical Engineer

    GE HealthCare (Waukesha, WI)
    …**Roles and Responsibilities** + Create and manage schematic designs using ECAD tools ( Cadence ). + Perform PCB layout for complex analog, digital, and ... schematic capture and transitioning an electrical design into PCB layout , as well as project database management, and design...related field. + Proficiency in ECAD tools such as Cadence Allegro or other design tools (eg. Mentor Graphics,… more
    GE HealthCare (06/13/25)
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  • HW Dev Engineer, Antenna Systems

    Amazon (Redmond, WA)
    …oscilloscopes, logic analyzers, and multi-meters - Experience with Mentor Graphics or Cadence layout tools Preferred Qualifications - Masters of Science or ... and test campaigns of the active antennas . Lead and review PCB layout Export Control Requirement: Due to applicable export control laws and regulations, candidates… more
    Amazon (06/14/25)
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  • Senior HW Dev Engineer-Payload, Hardware…

    Amazon (Redmond, WA)
    …oscilloscopes, logic analyzers, and multi-meters - Experience with Mentor Graphics or Cadence layout tools Preferred Qualifications - Experience with the project ... in collaboration with various teams - Lead and review schematic capture and PCB layout - Lead PCB vendor engagement for DFM review - Optimize PCB stack-up for… more
    Amazon (06/14/25)
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  • ECAD Designer (PCB Designer)

    Marotta Controls, Inc. (Parsippany, NJ)
    …experience in ECAD Electrical design and experience with schematic capture and circuit board layout using OrCad CIS and Cadence /OrCAD PCB Layout Pro work ... not limited to; vendors, suppliers, customers. Highly computer literate, OrCAD CIS, Cadence /Orcad PCB Layout Pro, MS Office/PC expertise, and demonstrated… more
    Marotta Controls, Inc. (04/24/25)
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  • Senior Analog, Custom IC Design/ Layout

    Cadence Design Systems, Inc. (San Jose, CA)
    At Cadence , we hire and develop leaders and innovators who want to make an impact on the world of technology. We offer fantastic opportunities to grow, no matter ... most challenging custom IC and system design and simulation problems using Cadence technology. This is a customer-facing application engineering (AE) role where you… more
    Cadence Design Systems, Inc. (04/12/25)
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  • Analog Mixed Signal Layout Designer

    Broadcom (San Jose, CA)
    …and chip level. + Thorough knowledge of industry standard EDA tools from Cadence , Mentor and Synopsys. + Experience with layout of high-performance high-speed ... for an experienced RFIC and Analog Mixed-Signal Physical Design and Layout Engineer **Qualifications include:** + BS in Electrical Engineering, Computer Engineering… more
    Broadcom (06/15/25)
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  • Senior Mask Design Engineer

    NVIDIA (Santa Clara, CA)
    …would be used on our NVIDIA products. What you will be doing: + Perform physical layout of SRAM and datapath circuits using Cadence tools. + Your duties will ... the latest FinFET technology nodes and design rules + Strong proficiency of layout tools ( Cadence Virtuoso is desired) + Knowledge of ICV layout verification… more
    NVIDIA (06/10/25)
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  • Sr. Manager, Analog Mixed Signal IC Design

    Teledyne (Camarillo, CA)
    …and capacitor matching. + Strong background with full custom circuit, block, and chip layout using Cadence Virtuoso tools, Layout L/XL, and physical ... semiconductor IC design including performing full custom analog IC layout . + Thorough understanding of deep sub-micron layout... layout . + Thorough understanding of deep sub-micron layout design practices such as parasitic RC delay, signal… more
    Teledyne (04/29/25)
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  • ASIC Package Signal/Power Integrity Engineer

    Cisco (San Jose, CA)
    …scattering and impedance network parameters * Proficient in Ansys EM flow * Proficient with Cadence APD for layout review * Fluent in Keysight ADS * Working ... drive ASIC package power and signal integrity rules and layout analysis to enable on-time, high-quality manufacturing releases. You...signaling * Analyze substrate SI/PI and provide feedback for layout * Collaborate with the layout team… more
    Cisco (04/02/25)
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  • IC Design Engineer

    Broadcom (San Jose, CA)
    …circuits in deep submicron process -Solid knowledge of precision and low noise analog layout techniques -High proficiency in driving Cadence Virtuoso XL GXL ... Account, please Sign-In before you apply.** **Job Description:** + Layout design of high precision analog / mixed signal...7nm FinFet -Knowledge of I/O, ESD, packaging, CAD setup, Cadence SKILL and Unix scripting is a plus -A… more
    Broadcom (04/24/25)
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