- Raytheon (Mckinney, TX)
- …proud to have a hand in creating.An opportunity exists for a Senior MMIC Design Engineer to join the Microelectronics Department at Raytheon. Our team designs custom ... platforms. The successful candidate will have experience in MMIC design of functions such as HPAs, LNAs, PSAs, TDUs,...TDUs, or High power switches in GaN, GaAs, or CMOS . The candidate will be responsible for the complete… more
- NVIDIA (Santa Clara, CA)
- …5 years industry experience. + Have an in-depth understanding of mosfet device behavior, CMOS layout , and VLSI design . + Experience working with standard ... with an in-depth understanding of circuits, layouts and VLSI design and enjoy working on the cutting edge of...cell design & layout . + Great interpersonal skills. + A passion for… more
- Teradyne (Agoura Hills, CA)
- …for ATE (Automatic Test Equipment) instruments. We are looking for a candidate with CMOS design and layout experience who has successfully taped-out several ... of high frequency and high scale of integration of mixed signal integrated circuits + CMOS FinFET (16nm or lower) design experience is a plus + Thorough… more
- Micron Technology, Inc. (Boise, ID)
- …working closely with teams across the organization including Process, Circuit, Design , Layout , Product Engineering, and Modeling/TCAD. Your expertise will ... communicate and advance faster than ever. As an Advanced CMOS Device & Process Integration Engineer, you will play...corrective actions as needed. + Define electrical test structures, design rule verification, and process monitoring. + Foster a… more
- NVIDIA (Santa Clara, CA)
- …2 plus year of work experience + A basic understanding of mosfet device behavior, CMOS layout , and VLSI design . + Excellent programming skills; experience ... expert support to designers in debugging tool, techfile and design errors. And you will develop flows and scripts...background with an understanding of circuits, layouts and VLSI design . We are looking for someone who enjoys writing… more
- NVIDIA (Santa Clara, CA)
- …+ 2 plus year of work experience + A basic understanding of mosfet device behavior, CMOS layout , and VLSI design . + Understanding of version control software ... expert support to designers in debugging tool, techfile and design errors. And you will develop flows and scripts...background with an understanding of circuits, layouts and VLSI design . We are looking for someone who enjoys writing… more
- NVIDIA (Santa Clara, CA)
- …+ 5+ years of work experience + A basic understanding of mosfet device behavior, CMOS layout , and VLSI design . + Excellent programming skills; experience ... expert support to designers in debugging tool, techfile and design errors. And you will develop flows and scripts...background with an understanding of circuits, layouts and VLSI design . We are looking for someone who enjoys working… more
- NVIDIA (Santa Clara, CA)
- …Engineering and 4+ year's experience + A basic understanding of mosfet device behavior, CMOS layout , and VLSI design + Excellent programming skills + ... with an in-depth understanding of circuits, layouts and VLSI design . We are looking for someone who loves to...for someone who loves to write code to automate design processes and who enjoys working in groundbreaking process… more
- MIT Lincoln Laboratory (Lexington, MA)
- …CurvyCore o Programming in Perl, TCL, or Python o Experience with RF layout design At MIT Lincoln Laboratory, our exceptional career opportunities include ... the Laboratory has implemented vertically integrated in-house resources to facilitate design , lithographic mask layout , material growth and characterization,… more
- NVIDIA (Santa Clara, CA)
- …of Photonics, CMOS , Electronics, and Systems engineers + Conduct chip layout circuit design , circuit checking, and device evaluation and characterization. + ... outstanding opportunity? We are looking for a Senior Photonic Layout Design Engineer - someone who is...design experience + Deep understanding of analog circuit layout and Silicon Photonic concepts in CMOS … more
- Capgemini (San Jose, CA)
- …digital-to-analog converters, PLL, transceivers, etc. Responsibilities include leading IC layout of cutting-edge high-performance, high-speed CMOS integrated ... Skills** + .10 years' experience in high performance analog layout in advanced CMOS process. + .Experience...design teams. + .Knowledge of skill code and layout automation + .Self-starter with the ability to define… more
- NVIDIA (Santa Clara, CA)
- …you interested in joining our Dynamic team? If yes, We are looking for a Senior Mask Layout Design Engineer - someone who is excited to join a growing group of ... TSMC N5/N4/N3 is preferred. + Experience with high-speed SerDes/RF layout design is helpful and Experience with...excellent to have. + Deep understanding of analog circuit layout concepts in submicron CMOS technologies +… more
- Capgemini (Santa Clara, CA)
- …the job you're considering** We are seeking a Senior Analog Layout Design Engineer with deep expertise in advanced CMOS FinFET technologies (TSMC 7nm, ... Design and develop high-speed analog/mixed-signal blocks, including TIAs, CMOS drivers, data converters, SerDes, and PLLs. + Manage...+ 7 years of experience in analog and RF layout design , including leadership of IC layouts… more
- Broadcom (San Jose, CA)
- …Broadcom is looking for an experienced RFIC and Analog Mixed-Signal Physical Design and Layout Engineer **Qualifications include:** + BS in Electrical ... experience in Mixed Signal and Analog RF IC Physical Design . + Experience developing and leading complex layout...layout IC for high speed applications in advanced CMOS FinFET technologies such as 5nm and 3nm at… more
- Skyworks (Irvine, CA)
- …using SOI, SiGe or CMOS technologies. + Develop circuit architecture, design , layout floor-planning, layout supervision, simulation, verification, and ... of product development, including product definition, architecture, system, transistor-level circuit design , MCM design , layout / layout supervision,… more
- MIT Lincoln Laboratory (Lexington, MA)
- …Advanced-Node version of Cadence o Programming in Perl, TCL, or Python o RF layout design experience o Experience with Cadence CurvyCore At MIT Lincoln ... the Laboratory has implemented vertically integrated in-house resources to facilitate design , lithographic mask layout , material growth and characterization,… more
- The Boeing Company (Tukwila, WA)
- …executes the whole design flow in-house (architecture definition, circuit design , RTL, synthesis, physical layout , verification, packaging and testing). SSED ... initial concepts, and architecture and trade studies; through behavioral modeling, circuit design and layout implementation. As well as ability to define… more
- Qualcomm (San Diego, CA)
- …all aspects of the design from system definition/simulation to circuit design and simulation. Heavy involvement in overseeing layout and silicon evaluation ... years of experience with analog or mixed-signal integrated circuit design in nanometer planar CMOS or FinFET...circuit designs for one or more blocks; participates in design reviews. * Works with layout teams… more
- Micron Technology, Inc. (Richardson, TX)
- …design validation, reticule experiments and required tape-out revisions. **_Contribute to the Design and Layout of New Memory Products_** + Implement device ... specifications and develop circuit solutions. + Design digital and analog circuits using CMOS ...a dynamic work environment **Manage Project Activities** + Lead design and layout resource allocations. + Serve… more
- Skyworks (Nashua, NH)
- …and procedures Responsible for custom layout , including overseeing the work of layout designers Reports on design results through design reviews, in ... Advanced understanding of layout tradeoffs for performance and size + Advanced design skills in system modeling + Strong knowledge of UNIX, Matlab, and circuit… more
