• Senior Engineer - Design

    Microsoft Corporation (Hillsboro, OR)
    …and optimize the Cloud infrastructure. We are looking for a **Senior Design for Test ( DFT ) Engineer ** to join the team. **Responsibilities** + Own block ... level DFT u-arch specification documentation & provide Test solutions in design for test... DFT knowledge about industry standard practice in Design for Test + ATPG, JTAG, Memory… more
    Microsoft Corporation (12/31/25)
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  • Functional DFT Engineer

    Celestica (Richardson, TX)
    …City: Richardson **Summary** We're searching for a dynamic and experienced Functional Design for Test ( DFT ) Engineer to join our team and play a pivotal ... 5+ years of experience in Test /Product, electronic design , or related fields + Exposure: to DFT...phases + Linux and scripting languages (Python, Perl) + DFT ( Design For Test ) process… more
    Celestica (11/18/25)
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  • Sr. DFT Design Engineer , AWS…

    Amazon (Austin, TX)
    …what is possible today. Key job responsibilities * Develop, implement and verify state-of-the-art Design for Test ( DFT ) architectures * Work with block ... designers to integrate DFT implementations * Work with physical design ...DFT , including ATPG, JTAG, MBIST and trade-offs between test quality and test time - Experience… more
    Amazon (12/25/25)
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  • DFT Engineer , Google Cloud

    Google (Sunnyvale, CA)
    Engineer , you will be responsible for defining, implementing and deploying advanced design -for- test ( DFT ) methodologies including Scan, MBIST, JTAG and ... DFT Engineer , Google Cloud _corporate_fare_ Google _place_...and TAP interfaces + Design Verification of DFT logic and test pattern generation + … more
    Google (12/13/25)
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  • SoC DFT Engineer , Google Cloud

    Google (Sunnyvale, CA)
    Engineer you will be responsible for defining, implementing and deploying advanced design -for- test ( DFT ) methodologies including Scan, MBIST, JTAG and ... SoC DFT Engineer , Google Cloud _corporate_fare_ Google...SoC DFT Engineer , Google Cloud _corporate_fare_ Google _place_ Sunnyvale, CA,...debug. + Design and Implement System Level Test strategy. + Implement core DFT circuitry,… more
    Google (01/07/26)
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  • HBM/DDR/SerDes DFT Verification Lead…

    Broadcom (San Jose, CA)
    …the robustness and reliability of our HBM, DDR and SerDes designs through comprehensive Design for Test ( DFT ) verification strategies. You will work ... We are seeking a highly skilled HBM and SerDes DFT Verification Engineer to join our dynamic...team. + Working closely with STA and DI Engineers design closure for test + Generating, Verifying… more
    Broadcom (12/06/25)
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  • Senior Principal DFT Design

    Cadence Design Systems, Inc. (Austin, TX)
    …We are looking for SoC/ASIC Digital Design Engineer with experience in Design for Test ( DFT ). An intimate knowledge and experience in scan chain ... years of professional experience in SoC/ASIC Digital Design with focus on Design for Test ( DFT ) + Should possess intimate knowledge of DFT insertion… more
    Cadence Design Systems, Inc. (12/05/25)
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  • DFT Design Engineer I, AWS…

    Amazon (Austin, TX)
    …what is possible today. Key job responsibilities * Develop, implement and verify state-of-the-art Design for Test ( DFT ) architectures * Work with block ... designers to integrate DFT implementations * Work with physical design team to setup and implement DFT insertion flow * Develop high coverage and cost… more
    Amazon (12/31/25)
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  • Design Automation DFT

    Broadcom (Fort Collins, CO)
    …Division is seeking a Design Automation Software Development Engineer in the Design For Test ( DFT ) team developing SoC ASIC products. They will ... If you already have a Candidate Account, please Sign-In before you apply.** **Job Description:** ** DFT Design Automation Engineer ** Broadcom's ASIC Products… more
    Broadcom (11/20/25)
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  • ASIC DFT Engineer

    Broadcom (Fort Collins, CO)
    …improvement to meet the product test metrics. It involves working with the Physical Design & STA team for DFT mode timing closure. The role could also ... activities for Broadcom APD (ASIC Products Division)'s designs - DFT Architecture, Test insertion and verification, Pattern...integration + Working closely with STA and DI Engineers design closure for test + Generating, Verifying… more
    Broadcom (12/23/25)
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  • Staff DFT Engineer

    Broadcom (San Jose, CA)
    …for DFT + Optimize DFT architecture for test cost, test power and physical design constraints + Deliver optimal retargetable ATPG patterns for usage ... Broadcom's CSG division is seeking candidates for a Staff DFT engineer position. The successful candidate will...candidate will be responsible for developing and implementing DFx ( Design for Test /debug & manufacturability) solutions for… more
    Broadcom (11/26/25)
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  • Senior DFT Engineer

    Microsoft Corporation (Raleigh, NC)
    …will manage and optimize the Cloud infrastructure. We are looking for a Senior DFT Engineer to join the team. **Responsibilities** + Execution across multiple ... projects, ensuring alignment with overall chip design goals. + Define and implement DFT architecture, including scan insertion, boundary scan, MBIST, and JTAG. +… more
    Microsoft Corporation (01/10/26)
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  • Senior Staff DFT Engineer

    Renesas (Austin, TX)
    Senior Staff DFT Engineer Job Description **About the team:** As part of Renesas's Infrastructure Power Business, you will contribute to the development of our ... computing in the datacenter. **What we need:** We are seeking a Mixed-Signal DFT Engineer to ensure efficient, high-coverage, testability for analog and… more
    Renesas (11/22/25)
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  • ASIC/SOC DFT Engineer (Silicon…

    SpaceX (Sunnyvale, CA)
    ASIC/SOC DFT Engineer (Silicon Engineering) Sunnyvale, CA...Rule Check (DRC) tools + Integration and verification of Design for Test ( DFT ) fabrics ... ultimate goal of enabling human life on Mars. ASIC/SOC DFT ENGINEER (SILICON ENGINEERING) At SpaceX we're...fast, reliable internet to millions of users worldwide. We design , build, test , and operate all parts… more
    SpaceX (12/27/25)
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  • DFT Engineer

    Broadcom (San Jose, CA)
    …and cutting edge network switching ASIC DFx ( Design for Test /debug & manufacturability) from DFT architecture, to implementation, verification, timing ... Description:** Broadcom's CSG division is seeking candidate for a DFT lead position. The successful candidate will be responsible...cost for test . **Responsibilities** + Drive the test quality of the products from Design more
    Broadcom (11/19/25)
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  • Senior DFT Methodology Engineer

    NVIDIA (Santa Clara, CA)
    …with 5+ years, MSEE with 3+ years, or PhD with 2+ years of experience in DFT , system architecture, or RTL design . + Understanding of fundamental DFT topics, ... works on groundbreaking innovations involving crafting creative solutions for cutting edge test techniques, in-system test architecture, as well as verification… more
    NVIDIA (01/10/26)
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  • Senior DFT Engineer

    NVIDIA (Santa Clara, CA)
    …human imagination and intelligence. Make the choice to join us today. Design -for- Test Engineering at NVIDIA works on groundbreaking innovations involving ... crafting creative solutions for DFT architecture, verification and post-silicon validation on some of...work with cross functional teams, implementing state-of-the-art designs in test access mechanisms, IO BIST, memory BIST and scan… more
    NVIDIA (10/29/25)
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  • Principal/ Senior Principal ASIC DFT

    Northrop Grumman (Linthicum Heights, MD)
    …to obtain and maintain an active clearance.** **Roles and Responsibilities:** + Responsible for DFT ( Design for Testabilty) aspects of ASIC Design thorough ... or SystemVerilog RTL coding and be highly proficient in DFT methodologies. + Responsible for operating in a team...+ Experience in full product life cycle of ASIC Design + Experience with Cadence and/or Mentor test more
    Northrop Grumman (11/21/25)
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  • Principal PCBA Test Engineer

    MKS Instruments Inc (Wilmington, MA)
    …looking for an exceptional Principal PCBA (Printed Circuit Board Assembly) Test Engineer to lead in the design , development and documentation of automated ... engineering, manufacturing, and quality teams. As a Principal PCBA Test Engineer , you will utilize your skills...Define and implement PCBA test strategies, including DFM/ DFT reviews during NPI. + Design , develop,… more
    MKS Instruments Inc (12/18/25)
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  • Senior ASIC Design Engineer - DFX

    NVIDIA (Santa Clara, CA)
    We are now looking for a Senior ASIC Design Engineer - DFX NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 sparked ... debug and issue resolution. + Mentor junior engineers on test design strategies and trade-offs related to...using JasperGold is a plus. + Deep expertise in DFT design , methodology, and implementation. + Familiarity… more
    NVIDIA (01/10/26)
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