- NVIDIA (Santa Clara, CA)
- Are you interested in joining our Dynamic team? If yes, We are looking for a Senior Mask Layout Design Engineer - someone who is excited to join a growing ... BSEE or equivalent experience. MSEE is a plus. + 8+ years of relevant mask design / layout experience + Tape-out experience with FinFET technology is… more
- NVIDIA (Santa Clara, CA)
- Are you a Mask Layout Design Engineer who is seeking am amazing opportunity? We are looking for a Senior Mask Layout Design Engineer - someone ... Engineering (or equivalent experience) + At least 5+ years of hands-on layout design experience + Deep understanding of analog circuit layout concepts… more
- MIT Lincoln Laboratory (Lexington, MA)
- …development, the Laboratory has implemented vertically integrated in-house resources to facilitate design , lithographic mask layout , material growth and ... and laying out devices, test structures, systems, and full mask reticles based on input from device and process...in Perl, TCL, or Python o Experience with RF layout design At MIT Lincoln Laboratory, our… more
- NVIDIA (Santa Clara, CA)
- …and intelligence. We would love to hear from you! We are looking for a Senior Mask Layout Design Engineer, someone who is excited to join a growing ... You will have a BSEE (or equivalent experience) + Minimum of 6 years of mask design / layout experience + Detailed knowledge of EDA tools from Cadence,… more
- NVIDIA (Santa Clara, CA)
- …human creativity and intelligence. We would love to hear from you! Are you looking for a Mask layout Design Engineer role? We are looking for a Senior ... Mask Layout Design Engineer! Someone who is excited to join a growing and multifaceted group of diverse individuals responsible for handling significant… more
- NVIDIA (Santa Clara, CA)
- …the world. This is our life's work, to amplify human creativity and intelligence. Are you a Mask Layout Design Engineer? If yes, We would love to hear from ... you! We are looking for a Senior Mask Layout Design Engineer, someone who is excited to join a growing and dynamic group of diverse individuals responsible… more
- Northrop Grumman (Manhattan Beach, CA)
- …the Northrop Grumman Microelectronics Center. Candidate will be primarily responsible for lithography mask layout using computer aided design (CAD) with ... PhD w/ 0 years exp) + Experience with Computer Aided Design (CAD) for microelectronics layout + Experience with Cadence Skill computer programming + US… more
- Cubic Corporation (Durham, NC)
- …IC or MEMS processes. + Proficiency using Design Workshop 2000 or similar mask layout tool is required. + Proficiency in running/modifying custom GPE scripts ... responsible for ensuring all PolyStrata(R) designs conform to documented layout procedures and design rules via DRC....via DRC. + Ensure the efficient operation of the mask design process. + Assist in development… more
- MIT Lincoln Laboratory (Lexington, MA)
- …development, the Laboratory has implemented vertically integrated in-house resources to facilitate design , lithographic mask layout , material growth and ... changes. The engineer will collaborate with others involved in mask layout from basic layout ...o Programming in Perl, TCL, or Python o RF layout design experience o Experience with Cadence… more
- Skyworks (Irvine, CA)
- …package related considerations for wirebond, bumps or pillars + Provide physical mask accessories layout support for new developing processes Required Experience ... Mask Assembly Automation Engineering - Co-Op Apply now...internal processes including GaAs and Filters + Interface with design teams, technology development teams, and factories to define… more
- OTTO Engineering (IL)
- Senior Printed Circuit Board Layout Designer - Communications OTTO's opportunity: Our Senior Printed Circuit Board Layout Designer will perform all aspects of ... Printed Circuit Design including creation and maintaining library components, collaborating with...understanding of schematics circuit functions is needed to implement layout strategies necessary for optimal ESD, EMC, Power and… more
- MIT Lincoln Laboratory (Lexington, MA)
- …development, the Laboratory has implemented vertically integrated in-house resources to facilitate design , lithographic mask layout , material growth and ... and classified networks. The candidate will have experience in the design of computer system solutions, including provisioning, configuration, and management of… more
- Google (Goleta, CA)
- …experience working in a physics research environment utilizing software engineering tools for layout design and development. + Experience with Python or other ... years of experience working in physics research environment utilizing software engineering tools for layout design and development. + Knowledge of Layout vs … more
- NVIDIA (Santa Clara, CA)
- …circuits that help power these chips. What you'll be doing: + Design best-in-class SRAM circuits using state-of-the-art technology processes + Optimize circuits for ... performance, area, and power + Supervise mask designers to craft high quality and... designers to craft high quality and dense pitch-matched layout + Verify functionality, electrical integrity, and robustness +… more
- NVIDIA (Santa Clara, CA)
- …circuits that help power these chips. What you'll be doing: + Design best-in-class SRAM circuits using state-of-the-art technology processes + Optimize circuits for ... performance, area, and power + Collaborate with mask designers to craft high quality and dense... designers to craft high quality and dense pitch-matched layout + Verify functionality, electrical integrity, and robustness +… more
- NVIDIA (Santa Clara, CA)
- …mixed-signal circuits + Lead mask designers, provide mentorship for floorplan and layout design + Provide support to the lab characterization of silicon, and ... the choice to join us today. We are now looking for a Senior-Mixed-Signal Design Engineer. As a member of our Mixed-Signal team, you will be leading architecture… more
- NVIDIA (Santa Clara, CA)
- …, simulation, and verification of mixed-signal circuits + Supervise closely IC circuit/ mask designers, provide floorplan and layout guidelines + Support lab ... of our Mixed Signal team, you will lead the design of CMOS high-speed interface circuits and mixed-signal circuits....and bring up. What you'll be doing: + Lead design and implementation of high speed interface circuit +… more
- Micron Technology, Inc. (San Jose, CA)
- …and reliability of non-volatile memory products. **Position Overview:** As a Principal Design Engineer, you will serve as a technical authority in the analog/core ... activities for upcoming projects or tech nodes, including driving DTCO ( design - technology co-optimization) CMOS scaling efforts and architecture definition. Your… more
- NVIDIA (Santa Clara, CA)
- …and gate-level circuit implementations, simulate behavior and timing waveforms, supervise mask layout , and verify robust functionality. + Task Automation ... (ATG) at NVIDIA is an organization of process, CAD, design , and test engineers that works closely with foundry...engineers that works closely with foundry partners and internal design groups. The team defines and prototypes sophisticated process,… more
- Texas Instruments (Dallas, TX)
- …manufacturing and process development + FEOL integration experience + Familiarity with physical layout (gds/oas). Knowledge of litho/OPC test pattern design and ... new TI products and make our customers' visions a reality. You'll define, design , model, implement, and document analog, digital, and RF integrated circuits (ICs).… more
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