• Senior Mask Layout Design

    NVIDIA (Santa Clara, CA)
    Are you a Mask Layout Design Engineer who is seeking am amazing opportunity? We are looking for a Senior Mask Layout Design Engineer - ... Engineering (or equivalent experience) + At least 5+ years of hands-on layout design experience + Deep understanding of analog circuit layout concepts… more
    NVIDIA (02/13/25)
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  • Senior Mask Layout Design

    NVIDIA (Santa Clara, CA)
    …you interested in joining our Dynamic team? If yes, We are looking for a Senior Mask Layout Design Engineer - someone who is excited to join a growing ... BSEE or equivalent experience. MSEE is a plus. + 8+ years of relevant mask design / layout experience + Tape-out experience with FinFET technology is… more
    NVIDIA (04/13/25)
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  • Senior Mask Design Engineer

    NVIDIA (Santa Clara, CA)
    …creativity and intelligence. We would love to hear from you! Are you looking for a Mask layout Design Engineer role? We are looking for a Senior Mask ... Have a BSEE or equivalent experience with Minimum of 5+ proven experience in Mask and Layout Design . + Deep understanding of analog circuit layout more
    NVIDIA (04/24/25)
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  • Senior Mask Design Engineer

    NVIDIA (Santa Clara, CA)
    …to the world. This is our life's work, to amplify human creativity and intelligence. Are you a Mask Layout Design Engineer ? If yes, We would love to hear ... from you! We are looking for a Senior Mask Layout Design Engineer , someone who is excited to join a growing and dynamic group of diverse individuals… more
    NVIDIA (03/04/25)
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  • Senior Mask Design Engineer

    NVIDIA (Santa Clara, CA)
    …creativity and intelligence. We would love to hear from you! We are looking for a Senior Mask Layout Design Engineer , someone who is excited to join a ... You will have a BSEE (or equivalent experience) + Minimum of 6 years of mask design / layout experience + Detailed knowledge of EDA tools from Cadence,… more
    NVIDIA (03/06/25)
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  • Integrated Circuit (IC) Layout

    MIT Lincoln Laboratory (Lexington, MA)
    …development, the Laboratory has implemented vertically integrated in-house resources to facilitate design , lithographic mask layout , material growth and ... radiation-hard CMOS, and other emerging integrated circuit technologies. The engineer will work in the Cadence environment, with which...in Perl, TCL, or Python o Experience with RF layout design At MIT Lincoln Laboratory, our… more
    MIT Lincoln Laboratory (03/12/25)
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  • Mask Assembly Automation Engineering…

    Skyworks (Irvine, CA)
    …package related considerations for wirebond, bumps or pillars + Provide physical mask accessories layout support for new developing processes Required Experience ... Mask Assembly Automation Engineering - Co-Op Apply now...internal processes including GaAs and Filters + Interface with design teams, technology development teams, and factories to define… more
    Skyworks (04/21/25)
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  • Principal / Senior Principal Microelectronic…

    Northrop Grumman (Manhattan Beach, CA)
    …the Northrop Grumman Microelectronics Center. Candidate will be primarily responsible for lithography mask layout using computer aided design (CAD) with ... Grumman Mission Systems has an opening for a Microelectronics Layout Engineer to join our team of...w/ 0 years exp) + Experience with Computer Aided Design (CAD) for microelectronics layout + Experience… more
    Northrop Grumman (04/08/25)
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  • Electronic-Photonic Process Design Kit…

    MIT Lincoln Laboratory (Lexington, MA)
    …development, the Laboratory has implemented vertically integrated in-house resources to facilitate design , lithographic mask layout , material growth and ... engineer will collaborate with others involved in mask layout from basic layout ...o Programming in Perl, TCL, or Python o RF layout design experience o Experience with Cadence… more
    MIT Lincoln Laboratory (02/07/25)
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  • Senior Hardware Engineer , Integrated…

    Google (Goleta, CA)
    …experience working in a physics research environment utilizing software engineering tools for layout design and development. + Experience with Python or other ... years of experience working in physics research environment utilizing software engineering tools for layout design and development. + Knowledge of Layout vs … more
    Google (04/12/25)
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  • Senior SRAM Engineer , Circuit…

    NVIDIA (Santa Clara, CA)
    We are now looking for a Senior SRAM Engineer !​ The Full Custom Macro team at NVIDIA designs specialized RAM implementations for NVIDIAs wide array of processing ... circuits that help power these chips. What you'll be doing: + Design best-in-class SRAM circuits using state-of-the-art technology processes + Optimize circuits for… more
    NVIDIA (03/04/25)
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  • Senior SRAM Engineer , Circuit…

    NVIDIA (Santa Clara, CA)
    We are now looking for a Senior SRAM Engineer within our Full Custom Memory (FCM) team! The FCM team designs specialized RAM implementations across NVIDIAs wide ... circuits that help power these chips. What you'll be doing: + Design best-in-class SRAM circuits using state-of-the-art technology processes + Optimize circuits for… more
    NVIDIA (02/20/25)
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  • Senior Mixed-Signal Design Engineer

    NVIDIA (Santa Clara, CA)
    …mixed-signal circuits + Lead mask designers, provide mentorship for floorplan and layout design + Provide support to the lab characterization of silicon, and ... the choice to join us today. We are now looking for a Senior-Mixed-Signal Design Engineer . As a member of our Mixed-Signal team, you will be leading architecture… more
    NVIDIA (04/28/25)
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  • Principal Design DTCO Engineer

    Micron Technology, Inc. (San Jose, CA)
    …performance and reliability of non-volatile memory products. **Position Overview:** As a Principal Design Engineer , you will serve as a technical authority in ... activities for upcoming projects or tech nodes, including driving DTCO ( design - technology co-optimization) CMOS scaling efforts and architecture definition. Your… more
    Micron Technology, Inc. (04/11/25)
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  • SRAM Circuit Design Engineer - New…

    NVIDIA (Santa Clara, CA)
    …for the next generation. We are looking to hire a skilled and creative circuit design engineer to help achieve these goals in a high-visibility position. What ... and gate-level circuit implementations, simulate behavior and timing waveforms, supervise mask layout , and verify robust functionality. + Task Automation… more
    NVIDIA (04/10/25)
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  • Senior Mixed Signal Design Engineer

    NVIDIA (Santa Clara, CA)
    …, simulation, and verification of mixed-signal circuits + Supervise closely IC circuit/ mask designers, provide floorplan and layout guidelines + Support lab ... of our Mixed Signal team, you will lead the design of CMOS high-speed interface circuits and mixed-signal circuits....and bring up. What you'll be doing: + Lead design and implementation of high speed interface circuit +… more
    NVIDIA (03/13/25)
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  • Resolution Enhancement Techniques Process…

    Texas Instruments (Dallas, TX)
    …manufacturing and process development + FEOL integration experience + Familiarity with physical layout (gds/oas). Knowledge of litho/OPC test pattern design and ... Love your job.** As a Resolution Enhancement Techniques (RET) Engineer , you'll architect new TI products and make our...and make our customers' visions a reality. You'll define, design , model, implement, and document analog, digital, and RF… more
    Texas Instruments (02/13/25)
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  • Principal HBM CAD Engineer

    Micron Technology, Inc. (Richardson, TX)
    …tape out and mask generation. + Drive close collaboration with HBM design , layout , & verification methodology teams to propose and co-develop capabilities ... The tools and flows enable all aspects of mixed-signal, transistor-level custom IC design including logical design , custom layout , parameterized cells,… more
    Micron Technology, Inc. (04/04/25)
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  • Semiconductor Equipment Engineer

    Northrop Grumman (Linthicum Heights, MD)
    …engineering. ATL is responsible for all aspects of semiconductor technology including design , mask making, wafer fabrication, test, and assembly. The ... (NGMC) of Mission Systems is seeking a Semiconductor Equipment Engineer for our Advanced Technology Lab (ATL) - located...- located outside of Baltimore, Maryland - where we design , manufacture, and test semiconductor products for internal and… more
    Northrop Grumman (04/29/25)
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  • Controls Engineer II

    Panasonic North America (Sparks, NV)
    **Overview** The Controls Engineer is responsible for analyzing product and equipment specifications and performance requirements to determine designs which can be ... produced by existing manufacturing or processing facilities and methods. The Engineer directs and coordinates manufacturing or building of prototype products or… more
    Panasonic North America (04/03/25)
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