- NVIDIA (Santa Clara, CA)
- …timing paths through ECOs including crosstalk and noise analysis. + Expertise in physical design and optimization eg, placement, routing, cell sizing, buffering, ... work, to amplify human inventiveness and intelligence. We are now looking for a motivated ASIC Timing Engineer to join our dynamic and growing team. If you want to… more
- Broadcom (San Jose, CA)
- …before you apply.** **Job Description:** **Broadcom is looking for a senior level ASIC physical design engineer. In this highly visible role, you will ... in Electrical Engineering or Computer Engineering with 6+ years of experience in Physical design .** + **Deep knowledge about industry standards in Physical … more
- The Boeing Company (Huntington Beach, CA)
- …and tools from block-level micro-architecture, through HDL coding, and physical design realization (through gate-level netlists for ASIC designs) + Integrate ... & Weapons Systems has an exciting opportunity for multiple ** ASIC and/or FPGA Design and Verification Engineers (Lead, Senior or Principal)** to join us as… more
- NVIDIA (Santa Clara, CA)
- We are now looking for a Senior ASIC Floorplan Design Engineer! NVIDIA is seeking a talented ASIC Floorplan Engineer to design and implement the ... and floorplan improvement opportunities + Solve timing and routing congestion issues with physical and ASIC design teams by influencing early design and … more
- SpaceX (Sunnyvale, CA)
- Sr. SOC/ ASIC Physical Design Engineer (Silicon Engineering) Sunnyvale, CA Apply SpaceX was founded under the belief that a future where humanity is out ... ultimate goal of enabling human life on Mars. SR. SOC/ ASIC PHYSICAL DESIGN ENGINEER (SILICON...and weekends as needed COMPENSATION AND BENEFITS: Pay range: Physical Design Engineer/ Senior : $170,000.00 -… more
- NVIDIA (Santa Clara, CA)
- NVIDIA is seeking an outstanding Senior ASIC Design Engineer to design and implement the world's leading SoC's and GPU's. This position offers the ... synthesis/timing clean design while working with the physical design team to ensure a routable...Systems design . + A deep understanding of ASIC design flow including RTL design… more
- NVIDIA (Santa Clara, CA)
- NVIDIA is looking for a Senior Reset and Boot ASIC Engineer...doing: + Be an integral part of the System ASIC Design team to help with the ... functions like Reset or Chip Boot + Solid frontend ASIC design skills, including RTL design...CHI + Familiar with OCP secure boot specification and physical security handling process + Possess design … more
- NVIDIA (Santa Clara, CA)
- We are now looking for a motivated Senior ASIC Design Engineer to join our dynamic and growing team in our Circuit Solutions Group! NVIDIA has continuously ... , Verilog and/or System-Verilog with a deep understanding of physical design and VLSI + Experience with...+ Strong familiarity and experience with all stages of ASIC design flow including front end … more
- NVIDIA (Santa Clara, CA)
- …closure to innovate and implement new Clocking topologies in RTL. + Collaborate with Physical design and timing team to evaluate Clocking concerns and develop ... will be architecting the clock domain to satisfy functional, physical and testing design requirements. + Engage...DFT teams. + Get involved in end-to-end cycle of ASIC execution starting from micro-arch, design implementation,… more
- SanDisk (Milpitas, CA)
- …+ Coordinate effectively with SoC Design , SoC Design Verification, ASIC Validation, DFT, Physical Design , Hardware, Mixed Signal IPs, Foundry, ... + Maintain and enforce the highest industry standards and best practices in ASIC design development. Provide mentorship and guidance to team members, fostering… more
- SpaceX (Irvine, CA)
- …to work extended hours and weekends as needed COMPENSATION & BENEFITS: Pay range: ASIC Design Engineer/ Senior : $160,000.00 - $220,000.00/per year Your actual ... Sr. ASIC Design Engineer (Silicon Engineering) Irvine,...Provide timing constraint for those IPs and support the physical implementation team (synthesis, timing closure, formality check) +… more
- Amazon (Austin, TX)
- …as architecture, front end design , pre-silicon verification, FPGA prototyping, Emulation, Physical design , BROM, FW, substrate and package design , ... ASIC /SOC leads) to create project execution plans for ASIC /SOC development considering all criteria to design ...from architecture definition, RTL design , Verification, IP design , Physical design , silicon bring… more
- SpaceX (Irvine, CA)
- Sr. ASIC Design Verification Engineer (Silicon Engineering) Irvine, CA Apply SpaceX was founded under the belief that a future where humanity is out exploring ... ultimate goal of enabling human life on Mars. SR. ASIC DESIGN VERIFICATION ENGINEER (SILICON ENGINEERING) At...and weekends as needed COMPENSATION & BENEFITS: Pay range: Design Verification Engineer / Senior : $160,000.00 - $220,000.00/per… more
- NVIDIA (Santa Clara, CA)
- … tradeoffs and methodology on next generation CMOS technology. We are looking for a Senior ASIC Synthesis Engineer to join our dynamic and growing team! If you ... intelligence. What You'll Be doing: + As a Front-End ASIC Synthesis Engineer, you will own RTL synthesis and...synthesis and gate level optimization tasks + Collaboration with physical design to address timing, area, congestion… more
- Cisco (Maynard, MA)
- Senior ASIC Timing Engineer Apply (https://jobs.cisco.com/jobs/Login?projectId=1449290) + Location:Maynard, Massachusetts, US + Area of InterestEngineer - ... are received. **Meet the Team** Join our team at Acacia, where we design advanced optical transceivers for high-speed fiber optic transmission in data centers and… more
- NVIDIA (Westford, MA)
- …life's work, to amplify human inventiveness and intelligence. NVIDIA is looking for best-in-class Senior ASIC Timing Design Engineers to join our outstanding ... a technology-focused company. What you will be doing: + You will drive physical design and timing of high-frequency and low-power DPUs and SoCs at block level,… more
- NVIDIA (Santa Clara, CA)
- … tradeoffs and methodology on next generation CMOS technology. We are looking for a Senior ASIC Timing Engineer to join our dynamic and growing team! If you ... or Computer Engineering or equivalent experience. + 8+ years experience in Physical design /Timing. + Experience in full-chip/sub-chip Static Timing Analysis… more
- Northrop Grumman (Morrisville, NC)
- …or propose changes to fix them + Work closely with design , verification, design -for-test and physical design teams to optimize the timing and improve ... (VHDL/Verilog/SystemVerilog) + Experience in the full product life cycle of ASIC Design + Effective communication and presentation skills and high proficiency in… more
- NVIDIA (Santa Clara, CA)
- …5+ years' experience or MS (or equivalent experience) with 3+ years' experience in ASIC Design and Timing + Hands-on experience in STA tools, ECO implementation, ... to collaborate with cross-functional teams. + Strong understanding of timing and physical design fundamentals Ways to stand out from the crowd: + Familiarity… more
- SpaceX (Sunnyvale, CA)
- …work extended hours and weekends as needed COMPENSATION AND BENEFITS: Pay range: Physical Design Engineer/ Senior : $170,000.00 - $230,000.00/per year Your ... will work alongside world-class cross-disciplinary teams (systems, firmware, architecture, design , validation, product engineering and ASIC implementation). In… more