- Renesas (Austin, TX)
- Senior Staff DFT Engineer Job Description **About the team:** As part of Renesas's Infrastructure Power Business, you will contribute to the development of ... the datacenter. **What we need:** We are seeking a Mixed-Signal DFT Engineer to ensure efficient, high-coverage, testability for analog and mixed-signal designs.… more
- NVIDIA (Santa Clara, CA)
- …join our diverse team today. We are now looking for a highly motivated and talented Senior DFT Infrastructure Engineer to join our DFX group to join this ... tools for ATE test vector release and fail analysis/diagnosis flows + Work with DFT , ATE bringup, Silicon FA teams + Create regression testcases to ensure flow… more
- Northrop Grumman (Morrisville, NC)
- …history. Northrop Grumman Mission Systems, Digital Technologies Group, is seeking an ASIC DFT Engineer to join our team of highly qualified, diverse individuals ... an active DoD Secret clearance.** **Roles and Responsibilities:** + Responsible for DFT (Design for Testabilty) aspects of ASIC Design thorough understanding of… more
- SpaceX (Sunnyvale, CA)
- Sr. SOC/ASIC DFT Engineer (Silicon Engineering) Sunnyvale, CA Apply SpaceX was founded under the belief that a future where humanity is out exploring the stars ... goal of enabling human life on Mars. SR. SOC/ASIC DFT ENGINEER (SILICON ENGINEERING) At SpaceX we're...as needed COMPENSATION AND BENEFITS: Pay range: Physical Design Engineer / Senior : $170,000.00 - $230,000.00/per year Your actual… more
- Cisco (San Jose, CA)
- Senior DFx/RTL Engineer Apply (https://jobs.cisco.com/jobs/Login?projectId=1447271) + Location:San Jose, California, US + Area of InterestEngineer - Hardware + ... teams, backend physical design teams to understand chip architecture and drive DFT requirements early in the design cycle. **Key Responsibilities:** + Responsible… more
- NVIDIA (Santa Clara, CA)
- …design tradeoffs and methodology on next generation CMOS technology. We are looking for a Senior ASIC Timing Engineer to join our dynamic and growing team! If ... frequency and power/area/congestions/yield/etc. + Work on all aspects of DFT /Test timing such as timing constraints, timing analysis, timing...to stand out from the crowd: + Experience with DFT timing closure for various modes eg scan shift,… more
- onsemi (Richardson, TX)
- **New Product Development Product/Test Engineer ** This position offers a great opportunity to work on industry leading semiconductor devices, targeted for broad ... business P&Ls on new product development activities, including defining Analog/Digital DfT and test strategies, developing low-cost test solutions for complex… more
- NVIDIA (Santa Clara, CA)
- …design tradeoffs and methodology on next generation CMOS technology. We are looking for a Senior ASIC Synthesis Engineer to join our dynamic and growing team! If ... You'll Be doing: + As a Front-End ASIC Synthesis Engineer , you will own RTL synthesis and gate level...power/area optimization across multiple design blocks + Work with DFT and Verification teams to ensure functional and timing… more
- NVIDIA (Santa Clara, CA)
- We are now looking for a Senior DFX Software Engineer - Machine Learning. Do you like to think creatively and enjoy solving challenges that require innovation? ... EDA solution. + Expertise in high performance algorithms for DFT , simulations, and failure analysis. + Understanding of different...are growing fast. If you're a creative and autonomous engineer with real passion for technology, we want to… more
- Palo Alto Networks (Santa Clara, CA)
- …for the manufacturing capabilities to build our next-generation network firewalls. As a senior test engineer , you will be responsible for building advanced test ... for test coverage and serviceability with ICT and boundary scan + Drive DfT (Design for Testability) and test coverage analyses from early Prototype design stages… more
- NVIDIA (Santa Clara, CA)
- We are now looking for a motivated Senior ASIC Design Engineer to join our dynamic and growing team in our Circuit Solutions Group! NVIDIA has continuously ... + Work with front-end teams to overlook correctness of the design (Lint/NA/CDC/Synthesis/ DFT /LEC/STA) + Partner and work with back-end team until chip tape-out. +… more
- General Motors (Warren, MI)
- …end-to-end design and development of our Central Compute hardware. In this role, the Senior Hardware Design Engineer - Central Compute will be responsible for ... (DFM), design for assembly (DFA), and design for testing ( DFT ) + Drive the validation and testing of hardware...(DFM), design for assembly (DFA), and design for testing ( DFT ) + Excellent problem-solving, analytical, and communication skills. +… more
- Renesas (Duluth, GA)
- Senior Staff Digital Engineer Job Description + **Education:** Bachelor or Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or ... Expertise in digital design implementation, including logical synthesis and DFT insertion with high coverage + Experience with static...generation and ATE support (a plus) + Experience in DFT or physical design (a plus) + Experience with… more
- NVIDIA (Santa Clara, CA)
- We are now looking for a Senior ASIC Engineer in the area of DFX ATPG flows and methodologies. Do you like to think creatively and enjoy solving challenges that ... be doing: + Support the deployment of advanced Design-For-Test ( DFT ) and Automatic Test Pattern Generation (ATPG) solutions +...to stand out from the crowd: + Knowledge of DFT including fault models, ATPG, fault simulation, and diagnosis… more
- Amazon (Sunnyvale, CA)
- …the world. Key job responsibilities As a Sr. PCBA Manufacturing Test Engineer , you will be responsible for deployment, qualification, continuous improvement of test ... test coverage, fault isolation capability, PCBA failure trends, and DFT (Design for Test) recommendations. * Run small teams...low-cost satellite system. As a Sr. PCBA Manufacturing Test Engineer , you have the ability to dive deep on… more
- NVIDIA (Santa Clara, CA)
- …human inventiveness and intelligence. We are now looking for a motivated ASIC Timing Engineer to join our dynamic and growing team. If you want to challenge yourself ... such as GPUs, CPUs, DPUs/Network processors, or SOCs + Understanding of DFT logic and experience with DFT timing closure for various modes eg, scan, BIST, etc. +… more
- NVIDIA (Santa Clara, CA)
- …position within a top-tier organization? In the role of Silicon Product Development Engineer at NVIDIA, you will be instrumental in launching our brand new Data ... ASIC Mixed Signal design, characterization, and qualification of BIST and SCAN DFT methodologies. + Knowledgeable in advanced Silicon Process technology such as… more
- NVIDIA (Santa Clara, CA)
- …human inventiveness and intelligence. We are now looking for a motivated ASIC Timing Engineer to join our dynamic and growing team. If you want to challenge yourself ... GPUs or Network processor implementation or SOCs. + Understanding of DFT logic and experience with DFT timing closure for various modes eg, scan shift and… more
- Applied Materials (Santa Clara, CA)
- …Product Life Cycle (PLC) process by defining Design For Transportability ( DFT ) requirements and influencing product design. Identify and execute continuous ... Materials and its Supply Base. Provide advanced training and support to Packaging Engineer III. Performs other duties as assigned. Duties will vary according to the… more
- NVIDIA (Santa Clara, CA)
- …in AI and computing. What you'll be doing: As a Reliability Methodology Engineer at NVIDIA, you will be responsible for ensuring our products and systems ... + Collaborate with design, product, and test engineering teams to apply DFT methodologies to improve reliability screening specific to HTOL (Component level Hight… more
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