• Sr Principal DFT

    Cadence Design Systems, Inc. (Austin, TX)
    …looking for SoC/ASIC Digital Design Engineer with experience in Design for Test ( DFT ). An intimate knowledge and experience in scan chain insertion, compression scan ... SoC/ASIC Digital Design with focus on Design for Test ( DFT ) + Should possess intimate knowledge of DFT...( DFT ) + Should possess intimate knowledge of DFT insertion flows + Basic scan chain insertion using… more
    Cadence Design Systems, Inc. (09/05/25)
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  • Senior Principal ASIC DFT

    Northrop Grumman (Morrisville, NC)
    …history. Northrop Grumman Mission Systems, Digital Technologies Group, is seeking an ASIC DFT Engineer to join our team of highly qualified, diverse individuals in ... DoD Secret clearance.** **Roles and Responsibilities:** + Responsible for DFT (Design for Testabilty) aspects of ASIC Design thorough...time off (PTO) for vacation and/or personal business. The application period for the job is estimated to be… more
    Northrop Grumman (07/08/25)
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  • Principal OR Sr . Principal

    Northrop Grumman (Linthicum Heights, MD)
    …and/or our Annapolis Junction, MD location.** **This position can be filled at the Principal level OR the Sr . Principal level. Qualifications for both ... US Government security clearance per business requirements. **Basic Qualifications for a Sr . Principal Computational Physicist:** + Bachelor's Degree in Science,… more
    Northrop Grumman (09/25/25)
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  • Principal / Senior Principal

    Northrop Grumman (Linthicum Heights, MD)
    …may be filled as a Principal Research & Development Engineer or Senior Principal Research & Development Engineer **Basic Qualifications for Principal ... obtain and maintain a Secret clearance. **Basic Qualifications for Senior Principal Research & Development Engineer:** *...* Atomistic simulation (eg Quantum ATK or LAMMPS) or DFT . * Device modeling and simulation (eg Synopsys, Silvaco,… more
    Northrop Grumman (10/01/25)
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  • Senior Principal Electrical Engineer…

    RTX Corporation (Cedar Rapids, IA)
    …demands of a rapidly evolving global market. This position is for a motivated Senior Principal Electrical or Computer engineering candidate to be involved in the ... ASIC / FPGA lab validation with advanced lab equipment + Design for Test ( DFT ) and manufacturability issues + Experience with Unix, scripting, C/C++, and/or Perl Do… more
    RTX Corporation (09/11/25)
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  • Senior Principal ASIC Static Timing…

    Northrop Grumman (Morrisville, NC)
    …Computer Engineering + Knowledge of Synthesis, Place & Route (P&R), and Design-for-Test ( DFT ) methodologies + Active DoD Secret Clearance or higher As a full-time ... Company paid holidays and paid time off (PTO) for vacation and/or personal business. The application period for the job is estimated to be 20 days from the job… more
    Northrop Grumman (07/11/25)
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