- SpaceX (Irvine, CA)
- Sr . SOC / ASIC Timing Signoff & Front-End Implementation Engineer (Silicon Engineering) Irvine, CA Apply SpaceX was founded under the belief that a future ... the ultimate goal of enabling human life on Mars. SR . SOC / ASIC TIMING SIGNOFF &...Work closely with chip architecture, design verification, physical design, DFT , and power teams to achieve tapeout success on… more
- SpaceX (Sunnyvale, CA)
- Sr . SOC / ASIC Physical Design Engineer (Silicon Engineering) Sunnyvale, CA Apply SpaceX was founded under the belief that a future where humanity is out ... the ultimate goal of enabling human life on Mars. SR . SOC / ASIC PHYSICAL DESIGN ENGINEER...CMOS analog circuit and physical design + Knowledge of DFT /Scan/MBIST/LBIST and understanding of their impact on physical design… more
- SpaceX (Bastrop, TX)
- Sr . SOC / ASIC Physical Design Engineer (Silicon Engineering) Bastrop, TX Apply SpaceX was founded under the belief that a future where humanity is out ... the ultimate goal of enabling human life on Mars. SR . SOC / ASIC PHYSICAL DESIGN ENGINEER...CMOS analog circuit and physical design + Knowledge of DFT /Scan/MBIST/LBIST and understanding of their impact on physical design… more
- Amazon (Austin, TX)
- …scale and rapid integration of emergent technologies. We're looking for an ASIC Design Eengineer to help us trail-blaze new technologies and architectures, while ... right trade-offs. Key job responsibilities - Lead and grow a team of SOC integration engineers responsible for critical deliverables in our ML accelerator chips -… more
- Amazon (San Diego, CA)
- …role you will: . Work closely with the system architects to develop world-class SOC and IP blocks, which meet power, area and performance targets. . Define, ... configure and integration SoC Subsystems . Contribute to the SoC .... Understand low power design & the impact of DFT on the blocks . Perform initial synthesis &… more
- Amazon (Austin, TX)
- …Develop and maintain comprehensive gate-level simulation test plans for verifying ASIC functionality and timing. Analyze simulation results, identify and debug logic ... Work closely with the system architects to develop world-class SOC and IP blocks, which meet power, area and.... Understand low power design & the impact of DFT on the blocks . Perform initial synthesis &… more
- NVIDIA (Santa Clara, CA)
- The NVIDIA Clocks Team is looking for an excellent Senior ASIC Verification engineer with extensive experience in Design Verification. The NVIDIA Clocks Team is ... high-quality clocking and reset logic to various units in SOC and GPU ASIC . The complexity of...implementing Test plans for pre-silicon platforms. + Understanding of DFT /IST is optional. We have some of the most… more
- Amazon (Austin, TX)
- …trade-offs. Key job responsibilities - integrate multiple subsystems into top level SOC , ensure correct clock/reset/functional/ DFT signal routing - As a key ... scale and rapid integration of emergent technologies. We're looking for an ASIC Design Eengineer to help us trail-blaze new technologies and architectures, while… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …We are a great and passionate engineering team building the next Palladium Emulation ASIC and system at Cadence Design System. Palladium has been the leader in the ... position will interact with both Front End (Design / DFT ) and Back End Implementation Teams (P&R). + Proficient...computer engineering with a minimum of 10 years of ASIC Design experience OR MS with a minimum of… more