- Northrop Grumman (Morrisville, NC)
- …career. Northrop Grumman Mission Systems, Digital Technologies Group, is seeking a Static Timing Engineer to join our team of highly qualified, diverse ... Secret clearance.** **Roles and Responsibilities:** + Responsible for static timing analysis on digital designs to ensure timing... timing analysis on digital designs to ensure timing requirements are met + Identify timing … more
- NVIDIA (Santa Clara, CA)
- …to amplify human inventiveness and intelligence. We are now looking for a motivated ASIC Timing Engineer to join our dynamic and growing team. If you want to ... work, to amplify human inventiveness and intelligence. What you'll be doing: + Drive timing analysis and closure of Nvidia's GPUs, CPUs, DPUs and SoCs at block… more
- NVIDIA (Santa Clara, CA)
- …to amplify human inventiveness and intelligence. We are now looking for a motivated ASIC Timing Engineer to join our dynamic and growing team. If you want to ... inventiveness and intelligence. What you'll be doing: + Drive timing analysis and closure of Nvidia's GPUs, CPUs, DPUs...DFX, Clocks, and other teams in coming up with timing closure strategy, creating timing constraints, driving… more
- NVIDIA (Santa Clara, CA)
- …and methodology on next generation CMOS technology. We are looking for a Senior ASIC Timing Engineer to join our dynamic and growing team! If you are problem ... you'll be doing: + You will be responsible for all aspects of timing including, timing analysis and closure, timing environment, setting up constraints and… more
- Qualcomm (San Diego, CA)
- …drive CPU timing closure for Oryon CPU Cores. As a CPU Physical Design Timing Engineer , you will work with microarchitecture and RTL design team to develop ... timing constraints, drive implementation of the designs to meet...STA native tools and also useful in enabling CPU timing infrastructure and methodology impacting multiple CPU projects in… more
- CACI International (Denver, CO)
- Network Timing Engineer Job Category: Information Technology Time Type: Full time Minimum Clearance Required to Start: TS/SCI with Polygraph Employee Type: ... on an ongoing basis. **Opportunity:** We are seeking an experienced Network Engineer to design, implement, and maintain a CAN/LAN environment hosting complex command… more
- Leidos (Dayton, OH)
- **Description** **Join Our Leidos Team as a Positioning, Navigation, and Timing Engineer !** Are you ready to elevate your career to new heights? Leidos is on the ... lookout for a talented and enthusiastic PNT Engineer to join our dynamic team supporting the National...testing, and documenting simulations related to Positioning, Navigation, and Timing (PNT). And let's not forget-you'll be part of… more
- Microsoft Corporation (Redmond, WA)
- …will manage and optimize the Cloud infrastructure. We are looking for a **Principal Timing /STA Engineer ** to join the team. **Responsibilities** + Lead the STA ... methodology development and execution to meet timing closure targets for complex semiconductor designs. + Collaborate...implementation, and physical design teams to define and drive timing constraints and methodology. + Conduct timing … more
- NVIDIA (Santa Clara, CA)
- …work, to amplify human inventiveness and intelligence. We are seeking a highly skilled Timing Methodology Engineer with expertise in asynchronous timing and ... I/O interface modeling to architect and deploy robust timing signoff practices across high-performance SoCs. You will play...You will play a critical role in defining cross-domain timing constraints, validating IO timing integrity, and… more
- Qualcomm (San Diego, CA)
- …Inc. **Job Area:** Engineering Group, Engineering Group > ASICS Engineering **General Summary:** As a Timing Engineer , you will play a vital role in Timing ... complex SOC's. Hands on contribution for STA timing sign off. + A timing Engineer should be able to understand all kind of intricate timing paths… more
- Cisco (San Jose, CA)
- ASIC Design Engineer - Design & Timing Constraints Apply (https://jobs.cisco.com/jobs/Login?projectId=1439367) + Location:San Jose, California, US + Area of ... of our systems, leveraging the latest technology. We're seeking a talented ASIC engineer with a proven track record in high-performance products, ready to make a… more
- NVIDIA (Santa Clara, CA)
- …work, to amplify human inventiveness and intelligence. We are seeking an innovative senior timing and VF Methodology engineer to develop pioneering timing ... CPUs and GPUs + Collaborate with methodology leads, and timing engineers to refine silicon V-F projections to model...tools can offer. + Work on various aspects of timing analysis and optimization with the goal of achieving… more
- NVIDIA (Santa Clara, CA)
- …to amplify human inventiveness and intelligence. We are seeking an innovative senior timing signoff and constraint methodology engineer to develop pioneering ... this role, you'll develop methodology and flows to validate timing constraints from RTL to netlist via structural, functional...(eg, PrimeTime, SNPS TCM ) and debug anomalies in timing reports. + Support tapeout-quality STA environments that are… more
- City of New York (New York, NY)
- …The Division of Traffic Operations seeks to hire an experienced Assistant Civil Engineer to support traffic signal timing and intersection control operations in ... position the candidate must be serving permanently in the title of Assistant Civil Engineer , or must have taken, passed, and be reachable on the open -competitive… more
- Google (Sunnyvale, CA)
- …field, or equivalent practical experience. + 5 years of experience in static timing analysis. + Experience in full chip timing sign-off checklist criteria ... ASICs. + Experience in PrimeTime or Tempus TCL scripting and static timing analysis debug. Preferred qualifications: + Experience writing, reviewing and verifying… more
- NVIDIA (Santa Clara, CA)
- …human inventiveness and intelligence. What you'll be doing: + Develop and execute timing closure plans for NVIDIA's next generation of high-performance IPs for CPU, ... GPU and SOC designs. + Owning static timing analysis and convergence of high-performance designs. + You...+ You will be responsible for all aspects of timing including setting up timing constraints, … more
- NVIDIA (Westford, MA)
- …inventiveness and intelligence. NVIDIA is looking for best-in-class Senior ASIC Timing Design Engineers to join our outstanding Networking Silicon engineering team, ... be doing: + You will drive physical design and timing of high-frequency and low-power DPUs and SoCs at...from RTL to gds2, including synthesis, equivalence checking, floor-planning, timing constraints, timing and power convergence, and… more
- Google (Mountain View, CA)
- …equivalent practical experience. + 5 years of technical experience in silicon timing closure and chip integration. + Experience with STA signoff constraint authoring ... checklists, and associated automation. + Experience in one or more static timing tools (eg, PrimeTime, Tempus). Preferred qualifications: + Master's degree or PhD… more
- Qualcomm (San Diego, CA)
- …Qualcomm chipsets in latest DDR technologies. This position requires involvement in static timing analysis (STA) and closure of DDR PHY interface and internal logic ... analysis and ownership of specific DDR PHY architecture components for timing closure bottlenecks and convergence feasibility. + Identification and analysis of… more
- Qualcomm (San Diego, CA)
- …& large-scale software automation enablement. Excellent understanding of statistical Liberty timing , power model and Front-end Verilog views and tools. Silicon ... with industry standard chip design tools and design flows for Static Timing Analysis, Spice / Fast spice simulation, Synthesis, DFT, Power Analysis **Education… more
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