• Senior UVM Digital

    Draper (Boston, MA)
    …Summary: Draper's Digital Design Team is seeking a motivated and experienced Senior UVM Digital Verification Engineer to tackle novel verification ... and ASICs. In this role, you will apply modern verification strategies to complex digital and mixed-signal... digital and embedded hardware platforms. + Develop verification and test plans + Develop UVM more
    Draper (10/11/25)
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  • SystemVerilog/ UVM Design…

    US Tech Solutions (Goleta, CA)
    …independently and take ownership of verification deliverables within a UVM /SystemVerilog environment. + The engineer will collaborate with design, ... **Job Description:** + The Verification Engineer will contribute to the... prior to tape-out. **Responsibilities:** + Perform pre-silicon functional verification of digital designs using UVM more
    US Tech Solutions (10/14/25)
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  • Principal Digital Verification

    Northrop Grumman (Linthicum Heights, MD)
    …of your career. We are looking for you to join our team as a Principal Digital Verification Engineer /Senior Principal Digital Verification ... NC. This requisition may be filled as a Principal Digital Verification Engineer or a...complex ASIC at block level and SOC level using UVM (Universal Verification Methodology) and SystemVerilogl. +… more
    Northrop Grumman (10/03/25)
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  • Staff Digital Verification

    Northrop Grumman (Annapolis Junction, MD)
    …**_This work will be done 100% onsite in Linthicum, MD._** **Basic Qualifications Staff Digital Verification Engineer :** + Bachelor's degree in a technical ... and able to obtain and maintain a security clearance.** **Preferred Qualifications Staff Digital Verification Engineer :** + Advanced Degree either MS or… more
    Northrop Grumman (08/27/25)
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  • Digital Verification Engineer

    Broadcom (San Jose, CA)
    …Sign-In before you apply.** **Job Description:** Broadcom is looking for a senior level Digital Design Verification engineer . In this highly visible role you ... PhD in Electrical Engineering or Computer Engineering with 10+ years of experience in digital design verification + Hands on experience in SV UVM , SV RNM and… more
    Broadcom (11/11/25)
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  • Senior Digital Verification

    Huntington Ingalls Industries (Fort Meade, MD)
    …Engineering, Computer Science, or a related field * Experience with modern digital verification and modeling languages: SystemVerilog, SystemC, C/C++, Matlab, ... short video: https://vimeo.com/732533072 Job Description Do you enjoy challenging digital design verification problems? HII Mission Technologies...etc. * UVM concepts * Directed, constrained-random, and assertion-based … more
    Huntington Ingalls Industries (10/09/25)
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  • Staff Lead Design Verification

    Northrop Grumman (Annapolis Junction, MD)
    …engineers to make these technologies a reality. **What You'll Get To Do:** As a Digital Verification Lead Engineer , you will have an opportunity to be ... Test (SEIT) department is seeking a Staff Lead Design Verification Engineer to join our team and...comprehensive test-benches for behavioral simulation + Design and implement verification strategies for complex digital systems +… more
    Northrop Grumman (10/16/25)
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  • Principal / Senior Principal FPGA/ASIC…

    Northrop Grumman (Linthicum Heights, MD)
    …Sr. Principal level. Qualifications for both are listed below:** **Basic Qualifications Principal Digital Verification Engineer :** + Bachelor's degree in a ... Top Secret/SCI security clearance with Polygraph** **.** **Basic Qualifications Senior Principal Digital Verification Engineer :** + Bachelor's degree in a… more
    Northrop Grumman (11/06/25)
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  • Wireless Modem Verification Engineer

    SpaceX (Irvine, CA)
    Wireless Modem Verification Engineer (Silicon Engineering) Irvine, CA Apply SpaceX was founded under the belief that a future where humanity is out exploring the ... goal of enabling human life on Mars. WIRELESS MODEM VERIFICATION ENGINEER (SILICON ENGINEERING) At SpaceX we're...capabilities of the Starlink network. RESPONSIBILITIES: + Responsible for digital ASIC verification at block and system… more
    SpaceX (11/18/25)
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  • ASIC Verification Engineer

    Meta (Sunnyvale, CA)
    …click "Apply to Job" online on this web page. **Required Skills:** ASIC Verification Engineer Responsibilities: 1. Develop and execute verification plans ... challenges. 3. Create and maintain testbenches and test cases using industry-standard verification languages and methodologies (eg 4. SystemVerilog, UVM ). 5.… more
    Meta (11/15/25)
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  • ASIC/FPGA Verification Engineer

    The Boeing Company (El Segundo, CA)
    …& Weapons; Strike, Surveillance and Mobility; and Autonomous Systems). As an ASIC/FPGA Verification Engineer on the Boeing Electronic Products team you will ... at other sites. **Position Responsibilities:** + Design and implement an ASIC/FPGA verification environment utilizing UVM & System Verilog. + Develop… more
    The Boeing Company (11/13/25)
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  • Senior Principal FPGA Verification

    BAE Systems (Westminster, CO)
    …may be available based on position level and/or job specifics. **Senior Principal FPGA Verification Engineer - $15K Sign On Bonus** **115210BR** EEO Career Site ... used across multiple projects. + Work in a System Verilog/ UVM environment developing tests, testbenches, UVM components,...(eg Ruby, Python, TCL). + Experience in documentation and verification of high-speed digital electronics, FPGAs, and… more
    BAE Systems (09/09/25)
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  • Senior Design Verification Engineer

    Google (Mountain View, CA)
    Senior Design Verification Engineer , Silicon _corporate_fare_ Google _place_ Mountain View, CA, USA **Mid** Experience driving progress, solving problems, and ... related field, or equivalent practical experience. + 8 years of experience with verification methodologies and languages such as UVM and SystemVerilog. +… more
    Google (10/16/25)
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  • Contractor - Sr ASIC Verification

    Tarana Wireless (Milpitas, CA)
    …will make such an impact on our products. We are looking for a Senior ASIC Verification Engineer that is self driven however knows when to collaborate to solve ... as Python What You'll Need: + BSEE required/MSEE preferred + 5-12 years of related Verification experience + Strong knowledge of UVM + Proficiency with at least… more
    Tarana Wireless (11/11/25)
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  • Lead E/E & Semiconductor Engineer - SOC…

    Capgemini (Seattle, WA)
    **Job Description:** We are seeking a SoC Design Verification Engineer to join our team 100% onsite in either Seattle, WA or Santa Clara, CA. The ideal candidate ... flows. **Preferred Qualifications** + Experience verifying GPU/CPU designs and developing UVM -based verification environments from scratch. + Background in… more
    Capgemini (10/14/25)
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  • SoC Verification Engineer

    Capgemini (Santa Clara, CA)
    …in Electrical Engineering, Computer Engineering or related field + Methodology expertise in UVM and SystemVerilog for SoC verification with the ability to create ... job you're considering** Join Capgemini's team as a SoC Verification Architect, where you'll play a critical role in...environments, ensuring the highest quality and reliability in complex digital systems. **Your role** + Architect and develop a… more
    Capgemini (11/18/25)
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  • Digital Design Engineer

    Meta (San Diego, CA)
    **Summary:** As a Digital Design Engineer at Meta Reality Labs, you will work with a world-class group of researchers and engineers, and use your digital ... drive our industry leading virtual and augmented reality systems. **Required Skills:** Digital Design Engineer Responsibilities: 1. Responsible for top-level or… more
    Meta (10/30/25)
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  • Senior Principal Design Verification

    BAE Systems (Nashua, NH)
    …be available based on position level and/or job specifics. **Senior Principal Design Verification Engineer - FPGA - (Sign-on Bonus)** **117194BR** EEO Career ... your career. BAE is looking for experienced senior level FPGA Design Verification Engineers who can plan, architect, and develop verification environments.… more
    BAE Systems (10/24/25)
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  • Senior Principal Engineer - ASIC/FPGA…

    BAE Systems (Cedar Rapids, IA)
    …may be available based on position level and/or job specifics. **Senior Principal Engineer - ASIC/FPGA Verification (Hybrid)** **117726BR** EEO Career Site Equal ... navigation missions. BAE is looking for experienced senior level ASIC/FPGA Design Verification Engineers who can plan, architect, and develop verification more
    BAE Systems (10/24/25)
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  • Sr. ASIC Design Verification

    Amazon (Sunnyvale, CA)
    …or Ph.D degree in Electrical / Communications Engineering - 10+ years in digital verification , preferably in communication systems - Familiarity with Matlab - ... Work with the design and communication systems team and participate in system level verification using test benches constructed using UVM , SystemC and DPI-C .… more
    Amazon (10/03/25)
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