- The Boeing Company (Mesa, AZ)
- …professional growth. Find your future with us. Boeing AvionX has an exciting opportunity ** UVM Advance Verification FPGA Engineer ** at Lead or Senior level ... Break from Christmas to New Years. We are seeking UVM Advance Verification engineers who are ambitious...breadth of the Boeing Avionics products. As an Advance Verification FPGA Engineer on the Boeing AvionX… more
- Northrop Grumman (Linthicum Heights, MD)
- …of your career. We are looking for you to join our team as a Principal Digital Verification Engineer /Senior Principal Digital Verification ... NC. This requisition may be filled as a Principal Digital Verification Engineer or a...complex ASIC at block level and SOC level using UVM (Universal Verification Methodology) and SystemVerilogl. +… more
- NVIDIA (Santa Clara, CA)
- We're now looking for a Senior Digital Design Verification Engineer ! NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in ... to join our diverse team today! As a Senior Digital Design Verification Engineer at...models and micro-architecture of the SerDes IPs using advanced verification methodologies such as UVM . + Build… more
- Northrop Grumman (Annapolis Junction, MD)
- …**_This work will be done 100% onsite in Linthicum, MD._** **Basic Qualifications Staff Digital Verification Engineer :** + Bachelor's degree in a technical ... and able to obtain and maintain a security clearance.** **Preferred Qualifications Staff Digital Verification Engineer :** + Advanced Degree either MS or… more
- Broadcom (San Jose, CA)
- …Sign-In before you apply.** **Job Description:** Broadcom is looking for a senior level Digital Design Verification engineer . In this highly visible role you ... PhD in Electrical Engineering or Computer Engineering with 6+ years of experience in digital design verification + Hands on experience in SV UVM , SV RNM and … more
- Amazon (Sunnyvale, CA)
- …networking and satellite bus FPGAs A day in the life Kuiper Production team FPGA verification engineer . Create UVM verification simulation solutions. The ... Description Kuiper Production team FPGA Verification engineer . Creating & Maintaining ...will work with design and systems teams to define/develop/implement/test/release UVM test environments in order to verify FPGA based… more
- Huntington Ingalls Industries (Fort Meade, MD)
- …Engineering, Computer Science, or a related field * Experience with modern digital verification and modeling languages: SystemVerilog, SystemC, C/C++, Matlab, ... short video: https://vimeo.com/732533072 Job Description Do you enjoy challenging digital design verification problems? HII Mission Technologies...etc. * UVM concepts * Directed, constrained-random, and assertion-based … more
- Huntington Ingalls Industries (Roanoke, VA)
- …Engineering, Computer Science, or a related field * Experience with modern digital verification and modeling languages: SystemVerilog, SystemC, C/C++, Matlab, ... short video: https://vimeo.com/732533072 Job Description Do you enjoy challenging digital design verification problems? HII Mission Technologies...etc. * UVM concepts * Directed, constrained-random, and assertion-based … more
- Northrop Grumman (Annapolis Junction, MD)
- …engineers to make these technologies a reality. **What You'll Get To Do:** As a Digital Verification Lead Engineer , you will have an opportunity to be ... Test (SEIT) department is seeking a Staff Lead Design Verification Engineer to join our team and...comprehensive test-benches for behavioral simulation + Design and implement verification strategies for complex digital systems +… more
- Northrop Grumman (Annapolis Junction, MD)
- …Sr. Principal level. Qualifications for both are listed below:** **Basic Qualifications Principal Digital Verification Engineer :** + Bachelor's degree in a ... Top Secret/SCI security clearance with Polygraph** **.** **Basic Qualifications Senior Principal Digital Verification Engineer :** + Bachelor's degree in a… more
- SpaceX (Irvine, CA)
- Wireless Modem Verification Engineer (Silicon Engineering) Irvine, CA Apply SpaceX was founded under the belief that a future where humanity is out exploring the ... goal of enabling human life on Mars. WIRELESS MODEM VERIFICATION ENGINEER (SILICON ENGINEERING) At SpaceX we're...capabilities of the Starlink network. RESPONSIBILITIES: + Responsible for digital ASIC verification at block and system… more
- ManpowerGroup (Mountain View, CA)
- Our client, a leader in technology innovation, is seeking a Silicon Verification Engineer to join their team. As a Silicon Verification Engineer , you ... mindset, which will align successfully in the organization. **Job Title:** Silicon Verification Engineer **Location:** Mountain View, CA **What's the Job?** +… more
- BAE Systems (Westminster, CO)
- …may be available based on position level and/or job specifics. **Senior Principal FPGA Verification Engineer - $15K Sign On Bonus** **115210BR** EEO Career Site ... used across multiple projects. + Work in a System Verilog/ UVM environment developing tests, testbenches, UVM components,...(eg Ruby, Python, TCL). + Experience in documentation and verification of high-speed digital electronics, FPGAs, and… more
- Tarana Wireless (Milpitas, CA)
- …will make such an impact on our products. We are looking for a Senior ASIC Verification Engineer that is self driven however knows when to collaborate to solve ... as Python What You'll Need: + BSEE required/MSEE preferred + 5-12 years of related Verification experience + Strong knowledge of UVM + Proficiency with at least… more
- Capgemini (Seattle, WA)
- **Job Description:** We are seeking a SoC Design Verification Engineer to join our team 100% onsite in either Seattle, WA or Santa Clara, CA. The ideal candidate ... flows. **Preferred Qualifications** + Experience verifying GPU/CPU designs and developing UVM -based verification environments from scratch. + Background in… more
- Lockheed Martin (Denver, CO)
- **Description:** Join Our Team as an **ASIC & FPGA Lead Verification Engineer ** where you will support over 50 different programs and research and development ... seeking a highly talented and motivated **ASIC & FPGA Verification Engineer ** who has a passion for...for a given design\. * Use SystemVerilog and Universal Verification Methodology \( UVM \) to verify a design… more
- BAE Systems (San Diego, CA)
- …be available based on position level and/or job specifics. **Senior Principal Design Verification Engineer - FPGA - (Sign-on Bonus)** **113449BR** EEO Career ... your career. BAE is looking for experienced senior level FPGA Design Verification Engineers who can plan, architect, and develop verification environments.… more
- Amazon (Sunnyvale, CA)
- …or Ph.D degree in Electrical / Communications Engineering - 10+ years in digital verification , preferably in communication systems - Familiarity with Matlab - ... Work with the design and communication systems team and participate in system level verification using test benches constructed using UVM , SystemC and DPI-C .… more
- Amazon (North Reading, MA)
- …Electrical / Computer Engineering or related field - 5+ years experience in digital verification , preferably in image processor, SoC/Interfaces - 3+ years ... Build assertions, traffic generators and scoreboards in SystemVerilog and UVM - Execute testplans and perform rigorous debug Basic...PH.D in Computer Engineering - 8+ years experience in digital verification , preferably in areas of image… more
- Capgemini (MA)
- …team focused on verifying cutting-edge digital IP blocks and subsystems. As a Digital Design Verification Engineer , you'll play a key role in ensuring ... semiconductor designs. **Your role** + Collaborate with cross-functional design and verification teams to validate complex IP blocks and subsystems. + Develop… more
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