- Qualcomm (San Diego, CA)
- …**Required Qualifications:** + Intelligent and high potential of learning new topics. + Familiarity with DDR interface, JEDEC spec, bus level view of ... create a smarter, connected future for all. Qualcomm's Silicon Validation team is part of the central SoC digital...languages and methodologies included in this team are: + DDR related debug + Regressionand PVT testing + Emulation… more
- Blue Cheetah Analog Design (Sunnyvale, CA)
- Silicon Validation Engineer Engineer [On-site Position - Sunnyvale, CA] Blue Cheetah Analog Design Inc. is a semiconductor technology start-up headquartered ... Description: * Use your silicon test experience to perform validation and qualification of our D2D silicon testchips *...tests * Thorough knowledge of oscilloscopes and BERTS * Familiarity with concepts of Jitter, Noise, & other non-idealities… more
- Qualcomm (San Diego, CA)
- …Group, Engineering Group > ASICS Engineering **General Summary:** **Post-Silicon Validation & Emulation** **Responsibilities:** + Perform Silicon bring-up, measure ... RTL, and Design teams to resolve them. + Automate validation flows, data collection, and analysis using Python or...**Qualifications:** + Understanding of mobile chip architecture (CPU, GPU, DDR , NOCs, etc.), basic RTL, and exposure to transistor… more
- Qualcomm (San Diego, CA)
- …help create a smarter, connected future for all. As a Qualcomm ASIC Engineer , you will define, model, design (digital and/or analog), optimize, verify, validate, ... Bachelor's degree in Science, Engineering, or related field. **Post-Silicon Validation & Emulation** **Responsibilities:** + Perform Silicon bring-up, measure… more
- Qualcomm (San Diego, CA)
- …and characterization. + Understanding firmware with the ability to write code (for DDR Training). + Familiarity with JEDEC specifications at electrical and ... Engineering, or related field and 4+ years of ASIC design, verification, validation , integration, or related work experience. OR Master's degree in Science,… more
- Amazon (Redmond, WA)
- …a new system with few legacy constraints. The Sr. FPGA design engineer will work with systems teams to define/develop/implement/test/release FPGA based solutions to ... solutions - Design and debug high-speed interfaces including Ethernet, PCIe, and DDR - Debug hardware issues using logic analyzers and oscilloscopes - Create… more
- Qualcomm (San Diego, CA)
- …SERDES Interfaces such as PCIe, USB4, UFS, DP, MIPI(DSI,CSI), PLLs and leading edge LP- DDR & PC- DDR Subsystem components (DRAM, DRAM Controller, Mixed Signal PHY ... data analysis of parametric performance over various operating conditions and configurations. Engineer will also assist in HW design and debug power integrity (PI)… more
- Micron Technology, Inc. (Richardson, TX)
- …and/or validating complex SOCs. + Experience working with Synopsys and/or Cadence validation IPs. + Familiarity with DRAM operation and JEDEC specifications, ... to enrich life. As an HBM SOC Pre-Silicon Verification Engineer , you will be responsible for the design &...blended into the same product, and most of the DDR or LPDDR design is based on the gate-level… more
- Qualcomm (San Diego, CA)
- …+ Master's degree in Electrical or Computer Engineering Experience with/in: + Familiarity of overall SoC Infrastructure - DDR , Busses, CPUs, I/Os ... smarter, connected future for all. As a Qualcomm ASIC Engineer , you will define, model, design (digital and/or analog),...power sequencing and multi-voltage domain design + Power analysis familiarity in areas of clocktree, peak power, TDP, limits… more
- Micron Technology, Inc. (Richardson, TX)
- …world uses information to enrich life. As an HBM SOC Design and Integration Engineer , you will be responsible for the design & development of next-generation HBM ... blended into the same product, and most of the DDR or LPDDR design is based on the gate-level...use a full ASIC flow. Lastly, verification and testing ( validation ) of HBM is the most challenging due to… more
- Micron Technology, Inc. (Dallas, TX)
- …world uses information to enrich life. As a MTS | DMTS HBM SOC Design Engineer , you will be responsible for the design & development of next-generation HBM DRAM ... blended into the same product, and most of the DDR or LPDDR design is based on the gate-level...use a full ASIC flow. Lastly, verification and testing ( validation ) of HBM is the most challenging due to… more
- NVIDIA (Santa Clara, CA)
- …understand the world. NVIDIA is seeking a Senior Cloud Service Provider (CSP) Application Engineer to join our team. In this role, you will collaborate with other ... concepts and help them with integration of design and validation all the way to deployment as part of...deployment. + Solid understanding of x86 server architecture, PCIe, DDR , Infiniband and high-speed interconnects + Basic understanding of… more
- BAE Systems (Nashua, NH)
- …Attack Solutions is seeking a talented, motivated Senior Principal Electrical Engineer .You will be joining anAgile engineering team at a dynamic company ... engineering position, will include the following: + The Senior Principal Hardware Test Engineer will participate on a team of Hardware Design engineers to design,… more
- Google (Sunnyvale, CA)
- …and CST. + Experience with SerDes testing in a lab setting, and familiarity with PCIE, DDR , SATA, and Ethernet standards. Understanding of state-of-the-art ... production design, with a focus on signal integrity and lab validation . + Familiarity with PCB, connector, or cable design and assembly processes, including… more
- RTX Corporation (Cambridge, MA)
- …serial point to point communication (sFPDP, SPI), and high-speed memory interfaces (HBM2, DDR ) + Familiarity with building Linux drivers for FPGA peripherals + ... development processes: RTL design, verification, timing analysis, lab bring up and validation + Understanding of DSP fundamentals and their implementation on FPGAs +… more
- Lockheed Martin (Orlando, FL)
- …with VHDL, Verilog, and/or System Verilog \- Experience in Hardware\-Software Integration and Validation \- Familiarity with FPGA toolsets \- Needs ability to ... development plans, including tasking for design capture, simulation, integration, validation , and sustainment * Interfacing with multiple engineering disciplines,… more