- SpaceX (Sunnyvale, CA)
- Principal SOC/ ASIC Physical Design Engineer (Silicon Engineering) at SpaceX Sunnyvale, CA SpaceX was founded under the belief that a future where ... possible, with the ultimate goal of enabling human life on Mars. PRINCIPAL SOC/ ASIC PHYSICAL DESIGN ENGINEER (SILICON ENGINEERING) At SpaceX we're… more
- NVIDIA (Santa Clara, CA)
- We are now looking for a motivated ASIC Physical Design and Timing Engineer to join our dynamic and growing team. If you want to challenge yourself and ... to amplify human inventiveness and intelligence. What you'll be doing: + Drive physical design and timing of high-frequency and low-power CPU, GPU, DPU and SoCs… more
- NVIDIA (Santa Clara, CA)
- We are now looking for a motivated Senior ASIC Physical Design PPA (Performance, Power, Area) Engineer to join our dynamic and growing team. If you are ... inventiveness and intelligence. What you'll be doing: + Drive physical design and timing of high-frequency and...ASIC design including RTL and logic design , physical and circuits design ,… more
- Amazon (Cupertino, CA)
- …you - come build the future with us! Key job responsibilities * Perform physical design for Amazon's machine learning custom silicon solutions * Participate in ... various aspects of physical design : full chip floorplanning, circuit analysis, power/clock distribution, timing optimization, place and route, power integrity… more
- Amazon (Cupertino, CA)
- …we're handling massive scale and rapid integration of emergent technologies. We're looking for an ASIC Physical Design Engineer to help us trail-blaze ... - BS + 8yrs or MS + 6yrs in EE/CS - 6+ years of experience in ASIC Physical Design from - RTL-to-GDSII in either 7nm, 14/16nm, 20nm, or 28nm - Block … more
- US Tech Solutions (Sunnyvale, CA)
- …10+ Years of experience as an ASIC Power engineer , or CAD Engineer / Physical Design engineer Experience with power estimation tools and synthesis, ... Job Description: Role: ASIC Power Engineer DUTIES ASIC Power Engineer ...some physical design Knowledge of power trade-offs in design and… more
- SpaceX (Sunnyvale, CA)
- Sr. FPGA/ ASIC Design Engineer (Silicon Engineering) at SpaceX Sunnyvale, CA SpaceX was founded under the belief that a future where humanity is out exploring ... ultimate goal of enabling human life on Mars. SR. FPGA/ ASIC DESIGN ENGINEER (SILICON ENGINEERING)...age, sexual orientation, gender identity, marital status, mental or physical disability or any other legally protected status. Applicants… more
- NVIDIA (Santa Clara, CA)
- We are now looking for a Senior ASIC Floorplan Design Engineer ! NVIDIA is seeking a talented ASIC Floorplan Engineer to design and implement the ... and floorplan improvement opportunities + Solve timing and routing congestion issues with physical and ASIC design teams by influencing early design and … more
- SLAC National Accelerator Laboratory (Menlo Park, CA)
- Senior ASIC Design Engineer Job ID 5971 Location SLAC - Menlo Park, CA Full-Time Regular **SLAC Job Postings** **Position Overview:** SLAC National ... Accelerator Laboratory seeks a Senior Application Specific Integrated Circuit ( ASIC ) design engineer within the Integrated Circuits Department of the… more
- SpaceX (Sunnyvale, CA)
- Sr. ASIC Design Engineer , DDR IP (Silicon Engineering) at SpaceX Sunnyvale, CA SpaceX was founded under the belief that a future where humanity is out ... ultimate goal of enabling human life on Mars. SR. ASIC DESIGN ENGINEER , DDR IP...age, sexual orientation, gender identity, marital status, mental or physical disability or any other legally protected status. Applicants… more
- Cisco (San Jose, CA)
- …team to address design bugs and close code coverage. * Work closely with physical design team to close design timing and place-and-route issues. * ... Who You'll Work With You will work with exceptional talent with vast ASIC design and development expertise. With Cisco being a systems company, you will also… more
- Amazon (Sunnyvale, CA)
- Description As a ASIC Design Engineer , you work with a team creating hardware accelerator IP to be deployed in a range of Amazon devices. You will develop ... IP in Verilog HDL - Help define and own ASIC design methodologies - Lead cross functional...registers, and error handling. - Experience working closely with physical design teams to develop highly optimized… more
- Meta (Sunnyvale, CA)
- …To apply, click "Apply to Job" online on this web page. **Required Skills:** ASIC Engineer , Design Responsibilities: 1. Work on architecture exploration and ... 5. Logic synthesis and optimization 13. 6. Physical Design (ECO) and 14. 7. Hardware/ ASIC lab debug and bring up. **Public Compensation:** $263,714/year to… more
- Qualcomm (Santa Clara, CA)
- …This is the Invention Age - and this is where you come in as an ASIC Design Verification Engineer The team is responsible for the complete verification ... Bachelor's degree in Science, Engineering, or related field and 2+ years of ASIC design , verification, validation, integration, or related work experience. OR… more
- Qualcomm (Santa Clara, CA)
- …> Camera Engineering **General Summary:** The Multimedia Camera HW team is looking for strong ASIC design engineer for an exciting opportunity to be involved ... + Experience with System Verilog or System C + ASIC implementation of Image Processing Camera IP + Experience...Processing Camera IP + Experience working with synthesis and physical design teams + TCL/Perl/Python/shell-scripting skills a… more
- NVIDIA (Santa Clara, CA)
- …Make the choice to join us today. The clocks group is looking for a top-notch ASIC engineer to join the team. The Team is responsible for crafting all aspects ... floor-planning and back end team to help craft the physical floorplan of the chip. The team explains the...team member, you will be collaborating with other architects, ASIC designers and verification engineers to design … more
- NVIDIA (Santa Clara, CA)
- …Make the choice to join us today. The Clocks group is looking for a top-notch ASIC engineer to join the team. The Team is responsible for crafting all aspects ... floor-planning and back end teams to help craft the physical floorplan of the chip and explains the programming...team member, you will be collaborating with other architects, ASIC designers and verification engineers to design … more
- SpaceX (Sunnyvale, CA)
- SOC/ ASIC Synthesis & Front-End STA Engineer ...and timing closure + Work closely with chip architecture, design verification, physical design , DFT, ... the ultimate goal of enabling human life on Mars. SOC/ ASIC SYNTHESIS & FRONT-END STA ENGINEER (SILICON...+ Experience with test modes, mode merging to optimize physical design implementation and STA Signoff +… more
- Meta (Sunnyvale, CA)
- …and IP for data center applications. **Required Skills:** ASIC Engineer , Implementation Responsibilities: 1. Run Logic/ Physical Synthesis using advanced ... in supporting them with the handoff tasks. Interact with Physical Design Engineers and provide them with...Power, Performance, Area. 14. Knowledge of front-end and back-end ASIC tools. 15. Experience with RTL design … more
- NVIDIA (Santa Clara, CA)
- … Design and Timing + Great understanding of timing and physical design fundamentals + Hands-on experience in ASIC timing closure at full chip or ... We are now looking for a motivated Senior ASIC Engineer , Timing to join our...intelligence. What you'll be doing: + You will drive physical design of high-frequency and low-power CPUs,… more