- SpaceX (Sunnyvale, CA)
- Sr. ASIC Design Engineer , DDR IP (Silicon Engineering) at SpaceX Sunnyvale, CA SpaceX was founded under the belief that a future where humanity is out ... ultimate goal of enabling human life on Mars. SR. ASIC DESIGN ENGINEER , DDR IP...Controller/PHY IP core development and integration + Responsible for RTL design , synthesis, timing constraints, power estimation,… more
- SpaceX (Sunnyvale, CA)
- Principal SOC/ ASIC Physical Design Engineer (Silicon Engineering) at SpaceX Sunnyvale, CA SpaceX was founded under the belief that a future where humanity is ... ultimate goal of enabling human life on Mars. PRINCIPAL SOC/ ASIC PHYSICAL DESIGN ENGINEER (SILICON...drive architectural feasibility studies, develop timing, power and area design targets, and explore RTL / design … more
- Amazon (Cupertino, CA)
- …massive scale and rapid integration of emergent technologies. We're looking for an ASIC Design Eengineer to help us trail-blaze new technologies and ... job responsibilities - As a key member of the ASIC design team, you will implement and...related technical field - 5+ years of experience in RTL design for SOC - 5+ years… more
- NVIDIA (Santa Clara, CA)
- …those, and incorporating those in NVIDIA's designs + Apply knowledge and gain experience in ASIC design including RTL and logic design , physical and ... looking for a motivated Senior ASIC Physical Design PPA (Performance, Power, Area) Engineer to...to work across different domains of ASIC design , collaborate and work with Arch, RTL ,… more
- SpaceX (Sunnyvale, CA)
- SOC/ ASIC Synthesis & Front-End STA Engineer ...design and timing closure + Deep understanding of ASIC design flow, top-down and bottom-up ... the ultimate goal of enabling human life on Mars. SOC/ ASIC SYNTHESIS & FRONT-END STA ENGINEER (SILICON...fast, reliable internet to millions of users worldwide. We design , build, test, and operate all parts of the… more
- NVIDIA (Santa Clara, CA)
- …+ 5 years of proven experience with tools and methodologies for ASIC design and verification. + Direct experience with RTL Linting EDA tools. + Proficiency ... world. We seek an RTL Analysis Methodology Engineer to join our Logic Design Implementation...to provide methodology insights. + Act as liaison between ASIC designers and EDA vendors. What we need to… more
- NVIDIA (Santa Clara, CA)
- NVIDIA is looking for a Senior ASIC Design Engineer for our Memory Controller team! As a Senior ASIC Engineer , you'll join a group of hard-working ... take part in IP core and IP integration level RTL design , synthesis, functional verification, and timing...years of meaningful experience with all stages in the ASIC design flow including functional and formal… more
- Qualcomm (Santa Clara, CA)
- …> Camera Engineering **General Summary:** The Multimedia Camera HW team is looking for strong ASIC design engineer for an exciting opportunity to be involved ... algorithms + Own and deliver core level IP + RTL design + Run synthesis, review results...+ Experience with System Verilog or System C + ASIC implementation of Image Processing Camera IP + Experience… more
- Meta (Sunnyvale, CA)
- **Summary:** Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in ... teams towards creating a first-pass silicon success. **Required Skills:** ASIC Design Verification Engineer Responsibilities:...scratch. 10. Experience debugging fails to the line of RTL , closing out bug fixes, using Verdi or equivalent… more
- SpaceX (Sunnyvale, CA)
- Sr. ASIC Design Verification Engineer (Silicon Engineering) at SpaceX Sunnyvale, CA SpaceX was founded under the belief that a future where humanity is out ... ultimate goal of enabling human life on Mars. SR. ASIC DESIGN VERIFICATION ENGINEER (SILICON...Experience with scripting languages, eg Python for automation + RTL design , chip bring-up, and post-silicon validation… more
- NVIDIA (Santa Clara, CA)
- NVIDIA is looking for a Senior ASIC Design Engineer for our Memory Controller team! As a Senior ASIC Engineer , you'll join a group of hard-working ... the opportunity to be responsible for the micro-architecture and design including RTL design , synthesis,...of relevant and proven experience and a background in ASIC design (Graphics, Microprocessors, Network Processors, or… more
- Meta (Sunnyvale, CA)
- …To apply, click "Apply to Job" online on this web page. **Required Skills:** ASIC Engineer , Design Responsibilities: 1. Work on architecture exploration and ... micro-architecture development. 2. Perform RTL development using Verilog, System Verilog and HLS. 3....12. 5. Logic synthesis and optimization 13. 6. Physical Design (ECO) and 14. 7. Hardware/ ASIC lab… more
- NVIDIA (Santa Clara, CA)
- …flow experience + Hold a basic sense of verification methodology + Good understanding of ASIC design flow including RTL design , verification, logic ... choice to join us today. NVIDIA is seeking best-in-class ASIC Design Engineers to design ...modules (Fuse, Strap, Floorsweep, In-silicon measurement, Reset, Sysctrl) + RTL design , synthesis, timing + Silicon bring-up… more
- Amazon (Sunnyvale, CA)
- Description As a Sr. ASIC Design Engineer , you work with a team creating hardware accelerator IP to be deployed in a range of Amazon devices. You will ... IP in Verilog HDL - Help define and own ASIC design methodologies - Lead cross functional...architectural models and algorithms in C/C+ - Experience in RTL coding and debug, as well as performance/power/area analysis… more
- Meta (Menlo Park, CA)
- …world-class complex SoC and IP for data center applications. **Required Skills:** ASIC Engineer , Design Responsibilities: 1. Architecture exploration. 2. ... **Summary:** Meta is hiring ASIC Design Engineers within our Infrastructure...Micro-architecture development. 3. RTL development using Verilog, System Verilog and HLS. 4.… more
- Meta (Sunnyvale, CA)
- …world-class complex SoC and IP for data center applications. **Required Skills:** ASIC Engineer , Design Responsibilities: 1. Architecture exploration. 2. ... **Summary:** Meta is hiring ASIC Design Engineers within our Infrastructure...Micro-architecture development. 3. RTL development using Verilog, System Verilog and HLS. 4.… more
- Meta (Menlo Park, CA)
- …world-class complex SoC and IP for data center applications. **Required Skills:** ASIC Engineer , Design Responsibilities: 1. Architecture exploration 2. ... **Summary:** Meta is hiring ASIC Design Engineers within our Infrastructure...Micro-architecture development 3. RTL development using Verilog, System Verilog and HLS 4.… more
- NVIDIA (Santa Clara, CA)
- We are now looking for a Senior ASIC Design Engineer for Memory Controllers. As a Senior Designer at NVIDIA, you'll join a group of hardworking engineers to ... the opportunity to be responsible for the micro-architecture and design including RTL design , synthesis,...+ You have experience with all stages in the ASIC design flow including emulation, prototyping, DFT,… more
- NVIDIA (Santa Clara, CA)
- …Make the choice to join us today. The Clocks group is looking for a top-notch ASIC engineer to join the team. The Team is responsible for crafting all aspects ... team member, you will be collaborating with other architects, ASIC designers and verification engineers to design ...thrive in a dynamically changing environment. + Experience in RTL design (Verilog), verification and logic synthesis.… more
- NVIDIA (Santa Clara, CA)
- We are now looking for an ASIC Design Efficiency Engineer ! NVIDIA is seeking extraordinary methodology engineers to design hardware accelerators and ... deliver fully verified, high performance, area and power efficient RTL to achieve design targets. + Collaborate...want to hear from you. Come, join our GPU ASIC team and help build the real-time, cost-effective computing… more