- BAE Systems (San Jose, CA)
- …Engineering, Computer Engineering, or Computer Science + Proficient in Verilog language for Front End ASIC design , and related FPGA + Knowledge of ASIC ... cores Buses, Controllers, PHYs, etc with other logic within ASIC / FPGA + Coordinate interoperability of digital modules...be available based on position level and/or job specifics. ** Senior Principal Front End ASIC Design… more
- GE HealthCare (Palo Alto, CA)
- … design teams, and Hardware Subsystem teams to help deliver mixed-signal and digital ASIC design solutions. The candidate will engage with module owners and ... associated demodulation, digital filtering, etc functional blocks) and digital ASIC design * Familiarity with System Verilog...to understand FPGA -based designs; familiar with transitioning FPGA solutions to ASIC * Scope and… more
- Tarana Wireless (Milpitas, CA)
- …demands of next generation SoCs + Work with system architects, RTL designers, FPGA and emulation engineers to ensure that verification requirements and coverage are ... met for each project Ways to stand out from the crowd: + Ability to handle complex and hard-do-solve problems in programming and verification + Ambitious and dedicated + Good interpersonal skills + Solid knowledge and strong experience of System Verilog, UVM,… more
- SpaceX (Sunnyvale, CA)
- Sr . DDR IP Design Engineer (Silicon...to support critical milestones COMPENSATION & BENEFITS: Pay range: ASIC / FPGA Design Engineer/ Senior : ... to make this possible, with the ultimate goal of enabling human life on Mars. SR . DDR IP DESIGN ENGINEER (SILICON ENGINEERING) At SpaceX we're leveraging our… more
- NVIDIA (Santa Clara, CA)
- …emphasis on Synopsys Protocompiler or Synplify Premier and Xilinx Vivado + Exposure to ASIC design and verification tools (VCS or equivalent, Verdi, GDB). + ... you'll be doing: + Build FPGA prototypes by making RTL FPGA -friendly, partitioning the design and taking it through synthesis and place and route. + Improve… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …subsystem verification and/or performance analysis* Strong knowledge of ASIC flow, RTL design in Verilog, System Verilog and FPGA design * Knowledge of ... want to make an impact on the world of technology. Senior Applications Engineer - DDR Design IPJob Location: San Jose, CAJob DescriptionThe Cadence IP team… more
- Siemens Digital Industries Software (San Jose, CA)
- …using VHDL/Verilog/SystemVerilog or HLS using C++/systemC + 5+ years of proven hands-on experience in ASIC / FPGA design using RTL or HLS + Good understand of ... Siemens EDA is a global technology leader in Electronic Design Automation software. Our software tools enable companies around...the increasingly complex world of chip, board, and system design . With a long-term legacy of success, innovation and… more
- SpaceX (Sunnyvale, CA)
- Sr . Design Verification Engineer (Silicon Engineering) at SpaceX Sunnyvale, CA SpaceX was founded under the belief that a future where humanity is out exploring ... the ultimate goal of enabling human life on Mars. SR . DESIGN VERIFICATION ENGINEER (SILICON ENGINEERING) At...of the Starlink network. RESPONSIBILITIES: + Responsible for digital ASIC and/or FPGA verification at block and… more
- quadric.io, Inc (Burlingame, CA)
- …Experience in data-parallel hardware design for high-performance computing + Experience in FPGA design is a plus + Experience in logic synthesis and ... floor of a revolutionary new processor architecture. As a senior member of our chip design team,...Computer Engineering with a minimum of five years of CPU/GPU/ ASIC front-end design + Proficiency in SystemC,… more
- Microsoft Corporation (Santa Clara, CA)
- …Verification Methodology (UVM)/C test bench + Perform Pre-Silicon SoC verification, Post-Silicon/ Field-Programmable Gate Array ( FPGA ) validation by ... (DPU) team within the Azure Hardware Systems & Infrastructure group is seeking a ** Senior Silicon Engineer** . You will join our front-end silicon team and be… more
- Tarana Wireless (Milpitas, CA)
- …operating systems. You will collaborate closely with L2/L3 software groups and FPGA / ASIC teams to deliver cross-layer features. Job Responsibilities: + ... You will be working on the design , development and integration of calibration software modules...in at least one of the following areas: + Array signal processing such as beam-forming and MIMO techniques… more
- Tarana Wireless (Milpitas, CA)
- …and real-time operating systems. Collaborate closely with L2/L3 software groups and FPGA / ASIC teams to deliver cross-layer features. Job Responsibilities: + ... processing + 9+ years of industry experience in a Senior /Lead role, encompassing the ownership of design ...+ Calibration procedures for multi-antenna based systems + Advanced array signal processing techniques, such as beam-forming and MIMO… more