- NVIDIA (Santa Clara, CA)
- …Make the choice to join us today. We are now looking for a highly motivated DFT Engineer to join this dynamic and innovative hardware team at NVIDIA. Our Design ... team works on groundbreaking innovations involving crafting creative solutions for DFT architecture, verification and post-silicon validation on some of the… more
- NVIDIA (Santa Clara, CA)
- We are now looking for a motivated Senior Circuit Design Engineer to join our dynamic and growing team. If you are looking for a challenging and exciting role in ... the entire line of products. + Be a mentor/technical lead for junior team members. What we need to...verification, knowledge of Place and Route, and understanding of Design -for-test ( DFT ) is a plus. + Proficiency… more
- NVIDIA (Santa Clara, CA)
- We are now looking for a motivated Senior Circuit Design Engineer to join our dynamic and growing team. If you are looking for a challenging and exciting role in ... the entire line of products. + Be a mentor/technical lead for junior team members. What we need to...challenges, knowledge of Place and Route, and understanding of Design -for-test ( DFT ) is a plus. + Proficiency… more
- NVIDIA (Santa Clara, CA)
- …of low power circuits, eg power gating, decaps, multi-vt is required. + Understanding of Design -for-test ( DFT ) and logic design is a plus. + Proficiency in ... you'll be doing: + Participate in cutting edge Processor design in deep submicron technologies. + Work as part...used in next generation GPUs. + Be a mentor/technical lead for junior team members. What we need to… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …and Route, Design Closure, and timing/power signoff, RTL to GDSII. Lead technical campaigns and strategies in the RTL to GDSII digital implementation space. ... customers in the areas of Backend Digital Design Implementation and Signoff including Synthesis, Place...Power, Performance, and Area (PPA) Deliver technical presentations and lead discussions internally and with customers. Work closely with… more
- NVIDIA (Santa Clara, CA)
- …silicon designs to improve quality, safety, and manufacturability. + Collaborate and Lead : Collaborate across System Architecture, DFT , ASIC, SW/FW, platform, ... validation, and production teams throughout the product life cycle; Lead system-level architecture, design , productization, debugging, and deployment. + Push the… more
- NVIDIA (Santa Clara, CA)
- …failures on Automatic Test Equipment (ATE) at Wafer and Package level + Lead multi-functional efforts with design , foundry, quality, test, customers and ... and statistical data driven problem solving + Experience with Scan/Mbist/IObist DFT test coverage, PVTF silicon characterization and AEC-Q100 qualification +… more
- Siemens Digital Industries Software (Fremont, CA)
- …motivated, and high performing individual for an opportunity to serve as the package design lead in our 3D IC Solutions Engineering team in driving the ... development, testing and validation of these workflows. The package design lead will also provide technical support...Virtuoso) o Physical Verification: DRC, LVS, IR/EM analysis o DFT integration and ATE test support. + Working knowledge… more
- Siemens Digital Industries Software (Fremont, CA)
- …435380 Siemens Digital Industries Software seeks a proven and motivated individual to lead the Technology Solutions Sales organization for the Siemens EDA Digital ... Design Creation Platform (DDCP) business unit, reporting directly to the Senior Vice President, EDA Global Sales. In this role, you will lead a global… more
- Palo Alto Networks (Santa Clara, CA)
- …+ 8+ years of electronics manufacturing testing experience + Experience with electronics system design and DfT + Experience using common lab equipment such as ... the manufacturing capabilities to build our next-generation network firewalls. As a senior test engineer, you will be responsible for building advanced test… more
- NVIDIA (Santa Clara, CA)
- …in the Logic-Fault-Isolation group and work closely with our test HW group, mechanical design and tool vendors. What You'll Be Doing: + Lead the enablement ... analysis techniques and methodologies. + Basic understanding of scan-chain based test ( DFT ) and some experience in operation Automated Test Equipment (at best on… more
- NVIDIA (Santa Clara, CA)
- …limiters at wafer sort and package level on Automatic Test Equipment (ATE) + Lead multi-functional efforts with DFx, Design , Timing, Test, Foundry to root-cause ... solutions to complex problems and be on front-line to lead showstopper bugs + Have opportunity to influence future...and strong sense of ownership + Exposure to digital design and circuit analysis + Experience with product characterization… more