• Senior Silicon Engineer

    Microsoft Corporation (Santa Clara, CA)
    …cutting-edge, high performance, low power , scalable and programmable DPU silicon . **Responsibilities** + As a Senior Silicon Engineer in the ... Azure Hardware Systems & Infrastructure group is seeking a Senior Silicon Silicon Engineer. You... latency, high bandwidth) design techniques + Understanding of low power microarchitecture techniques. Knowledge of Verilog,… more
    Microsoft Corporation (04/11/24)
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  • Sr. FPGA/ASIC Design Engineer ( Silicon

    SpaceX (Sunnyvale, CA)
    …with advanced silicon process and technology nodes for high speed and low power consumption + Software design and development skills + Excellent scripting ... Sr. FPGA/ASIC Design Engineer ( Silicon Engineering) at SpaceX Sunnyvale, CA SpaceX was...to solve complex problems including clock domain crossings and power optimization + ASIC/SoC system integration experience + Experience… more
    SpaceX (05/17/24)
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  • Sr. Synthesis & Front-End STA Engineer…

    SpaceX (Sunnyvale, CA)
    power intent verification and post synthesis timing validation flows + Execute low power design and physical synthesis, deploying knowledge of unified ... Sr. Synthesis & Front-End STA Engineer ( Silicon Engineering) at SpaceX Sunnyvale, CA SpaceX was...flow, top-down and bottom-up design methodologies + Knowledge of low - power methodologies and leakage/dynamic power more
    SpaceX (05/09/24)
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  • Sr. Staff Design Engineer ( Low

    Qualcomm (Santa Clara, CA)
    …is also responsible for the silicon power measurements, Si debug and power correlation. + Experience in SoC low power micro-architecture, low ... will be working on WiFi (802.11x) technology, SOC Design, Low Power micro-architecture, Power Intent/Implementation,... Power Intent/Implementation, power optimization and power estimation + Experience in silicon bring… more
    Qualcomm (05/17/24)
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  • Senior Power Optimization…

    NVIDIA (Santa Clara, CA)
    We are now looking for a Senior Power Optimization and Analysis Engineer! NVIDIA prides ourselves in having energy efficient products. We believe that continuing ... efficiency. + Develop and share best practices for performing pre- silicon power analysis. + Perform comparative ...of concepts of energy consumption, estimation, data movement and low power design. + Familiarity with Verilog… more
    NVIDIA (05/18/24)
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  • Senior Emulation Power Engineer

    NVIDIA (Santa Clara, CA)
    …+ Good understanding of concepts of energy consumption, estimation, data movement and low power design. + Familiarity with Verilog and ASIC design principles, ... We are looking for a Senior Emulation Power Engineer! NVIDIA prides...captures. + Use internally developed tools and industry standard pre- silicon Gate-level and RTL power analysis tools,… more
    NVIDIA (05/18/24)
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  • Senior Datacenter GPU Power

    NVIDIA (Santa Clara, CA)
    …of energy efficient chip/system design fundamentals and related tradeoffs. + Familiarity with low power design techniques such as multi-VT, Clock gating, ... We are looking for a Senior Datacenter GPU Power Architect. NVIDIA...to drive new HW/SW features for Perf@Watt improvements. + Pre- silicon thermal analysis for next-gen GPUs including design of… more
    NVIDIA (04/18/24)
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  • Senior Architecture Energy Modeling…

    NVIDIA (Santa Clara, CA)
    …and Analysis Team, you will collaborate with Architects, ASIC Design Engineers, Low Power Engineers, Performance Engineers, Software Engineers, and Physical ... + Basic understanding of fundamental concepts of energy consumption, estimation, and low power design. + Desire to bring quantitative decision-making and… more
    NVIDIA (04/14/24)
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  • Senior Timing Methodology Engineer

    NVIDIA (Santa Clara, CA)
    …Good understanding of mathematics/physics fundamentals of electrical design. + Clear understanding of low power design techniques such as multi VT, Clock gating, ... to amplify human inventiveness and intelligence. We are seeking an innovative Senior Timing Methodology Engineer to help drive sign-off strategies for the world's… more
    NVIDIA (06/19/24)
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  • Senior 3D IC Flows and Methodology…

    NVIDIA (Santa Clara, CA)
    …+ Experience with Testchip designs and/or Product designs. + Multiple clock domain and Low Power Design. + Expertise with Python, TCL + Enjoy working with ... on 3D-IC Heterogenous integration as a comprehensive co-optimization from System to Silicon in partnership with domain experts. + Establish 3D-IC prototypes across… more
    NVIDIA (05/29/24)
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  • Senior System Software Engineer - Tegra

    NVIDIA (Santa Clara, CA)
    We are now hiring a Senior System Software Engineer to join the NVIDIA's System Software group focusing on Data Center Server Platform Diagnostics. You will join a ... that builds and maintains software for complex heterogeneous computing systems that power sophisticated server products used in ground breaking of diverse AI, HPC,… more
    NVIDIA (04/16/24)
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  • Senior Circuit Design Engineer

    NVIDIA (Santa Clara, CA)
    …datapath Tiling techniques is required. + Hands on experience in design and analysis of low power circuits, eg power gating, decaps, multi-vt is required. + ... team to design the state of the art in silicon monitors and many innovative custom macros. + Apply...custom macros. + Apply circuit techniques to improve the power , performance and area utilization of the various communication… more
    NVIDIA (06/06/24)
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  • Senior Software Engineer, Hardware/Software…

    Google (Sunnyvale, CA)
    …Transfer Level code in Verilog. + Experience with non-x86 microarchitectures, including low level performance analysis. + Experience in Python and good understanding ... of Object Oriented Programming and Functional Programming. + Experience with silicon architecture and design with the ability to root cause performance bottlenecks… more
    Google (06/20/24)
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  • CAD - DV Emulation Engineer, Sr. Staff

    Qualcomm (Santa Clara, CA)
    …circuits, and/or physical design to develop and verify critical high performance and low power CPU designs. * Anticipates, identifies, and solves highly complex ... will work with RTL, architecture, design, DV, software and silicon verification users. Interfaces with various cross functional teams...of work experience in a role requiring interaction with senior leadership (eg, Director level and above). + 1+… more
    Qualcomm (05/25/24)
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  • CPU Micro-architect/RTL Designer

    Qualcomm (Santa Clara, CA)
    …circuits, and/or physical design to develop and verify critical high performance and low power CPU designs. * Anticipates, identifies, and solves highly complex ... 10+ years of work experience with simulation, emulation, formal verification, or silicon validation. * 10+ years of experience in creating functional models,… more
    Qualcomm (04/10/24)
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  • Sr. CAD Engineer, ASIC

    Amazon (Sunnyvale, CA)
    Description Project Kuiper is an initiative to launch a constellation of Low Earth Orbit satellites that will provide low -latency, high-speed broadband ... connectivity. Come work at Amazon! The Role: As Senior CAD Engineer you will be responsible for installing...digital design implementation flows to design teams using various silicon processes - Develop, regress, and deploy digital front… more
    Amazon (06/07/24)
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