- Qualcomm (Austin, TX)
- …SoC Implementation Team is looking for skilled engineers to focus on timing constraints development, power analysis, STA , and timing closure for ... This is an excellent opportunity to join the Snapdragon implementation team, which is responsible for SoCs in sub-3nm...and low-power multi-voltage domain crossings, and signoff with static timing analysis. + Collaborate closely with RTL design… more
- Qualcomm (Austin, TX)
- …you will work with microarchitecture and RTL design team to develop timing constraints, drive implementation of the designs to meet aggressive power, area ... Design Timing Engineer,... automation using TCL/Perl/Python. + Familiar with digital flow design implementation RTL to GDS : ICC, Innovous… more
- Meta (Austin, TX)
- …RTL DFT Analysis and improve the DFT coverage for Stuck-at faults. 7. Develop Timing Constraints for RTL-Synthesis and PrimeTime- STA for the blocks and the ... Methodology for all FE-tools including (Lint, CDC, RDC, Synthesis, STA , Power). 9. Work closely with the Design...supporting them with the handoff tasks. Interact with Physical Design Engineers and provide them with timing /congestion… more
- Cadence Design Systems, Inc. (Austin, TX)
- …Backend Digital Design Implementation and Signoff including Place and Route, Design Closure, and timing /power signoff + Guide customers on how to best ... nanometer design , unlock unique expertise in digital design implementation , and level up your communication,...STA , Prime Time, Tempus, ETS* Strong fundamentals in Timing / timing closure. We're doing work… more
- SpaceX (Bastrop, TX)
- …will work alongside world-class cross-disciplinary teams (systems, firmware, architecture, design , validation, product engineering, ASIC implementation ). In this ... voltage drop, logic equivalency and other signoff checks) + Develop/improve physical design methodologies and automation scripts for various implementation steps… more
- Samsung Electronics Co., Ltd. (Austin, TX)
- …verify the functionality and correctness of the design . + You collaborate with implementation to achieve your timing and area. + You produce quality RTL on ... be interacting with the system architects, verification, performance/power and design implementation teams. You will be owning...power optimization and also work on logic debug and timing closure of the design . Solid engineer… more